From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
To: Mans Rullgard <mans@mansr.com>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
patches@opensource.wolfsonmicro.com,
Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH] ASoC: wm8974: configure pll and mclk divider automatically
Date: Mon, 25 Jan 2016 13:49:53 +0000 [thread overview]
Message-ID: <20160125134953.GK1490@localhost.localdomain> (raw)
In-Reply-To: <1453725403-6261-1-git-send-email-mans@mansr.com>
On Mon, Jan 25, 2016 at 12:36:43PM +0000, Mans Rullgard wrote:
> This adds a set_sysclk() DAI op so the card driver can set the
> input clock frequency. If this is done, the pll and mclk divider
> are configured to produce the required 256x fs clock when the
> sample rate is set by hw_params().
>
> These additions make the codec work with the simple-card driver.
> Card drivers calling set_pll() and set_clkdiv() directly are
> unaffected.
>
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Thanks,
Charles
next prev parent reply other threads:[~2016-01-25 13:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-25 12:36 [PATCH] ASoC: wm8974: configure pll and mclk divider automatically Mans Rullgard
2016-01-25 13:49 ` Charles Keepax [this message]
2016-01-27 18:37 ` Applied "ASoC: wm8974: configure pll and mclk divider automatically" to the asoc tree Mark Brown
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