From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
To: Daniel Baluta <daniel.baluta@nxp.com>
Cc: alsa-devel@alsa-project.org, shengjiu.wang@freescale.com,
patches@opensource.wolfsonmicro.com, lgirdwood@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
viorel.suman@nxp.com, mihai.serban@nxp.com, tiwai@suse.com
Subject: Re: [PATCH v3 2/2] ASoC: codec: wm8960: Relax bit clock computation
Date: Tue, 21 Mar 2017 16:39:58 +0000 [thread overview]
Message-ID: <20170321163958.GA6986@localhost.localdomain> (raw)
In-Reply-To: <1490108605-20538-3-git-send-email-daniel.baluta@nxp.com>
On Tue, Mar 21, 2017 at 05:03:25PM +0200, Daniel Baluta wrote:
> WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
> clocking register (See WM8960 datasheet, page 71).
>
> There are use cases, like this:
> aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
>
> where no BCLKDIV applied to sysclock can give us the exact requested
> bitclk, so driver fails to configure clocking and aplay fails to run.
>
> Fix this by relaxing bitclk computation, so that when no exact value
> can be derived from sysclk pick the closest value greater than
> expected bitclk.
>
> Suggested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Thanks,
Charles
next prev parent reply other threads:[~2017-03-21 16:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-21 15:03 [PATCH v3 0/2] wm8960: Relax bit clock computation Daniel Baluta
2017-03-21 15:03 ` [PATCH v3 1/2] ASoC: codec: wm8960: Refactor sysclk freq search Daniel Baluta
2017-03-21 15:03 ` [PATCH v3 2/2] ASoC: codec: wm8960: Relax bit clock computation Daniel Baluta
2017-03-21 16:39 ` Charles Keepax [this message]
2017-03-24 19:15 ` Applied "ASoC: codec: wm8960: Relax bit clock computation" to the asoc tree Mark Brown
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