From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: alsa-devel@alsa-project.org
Cc: tiwai@suse.de,
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
liam.r.girdwood@linux.intel.com, vinod.koul@intel.com,
broonie@kernel.org, jarkko.nikula@linux.intel.com,
andriy.shevchenko@linux.intel.com
Subject: [PATCH 2/7] ASoC: Intel: cht_bsw_max98090: Fix I2S config + unused code
Date: Fri, 8 Sep 2017 00:13:04 -0500 [thread overview]
Message-ID: <20170908051309.19028-3-pierre-louis.bossart@linux.intel.com> (raw)
In-Reply-To: <20170908051309.19028-1-pierre-louis.bossart@linux.intel.com>
This driver probably never worked, the slots are configured
for 2ch 16 bit and the SSP2 as 24 bits, the cpu_dai configured as
LEFT_J and the codec_dai as I2S.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
sound/soc/intel/boards/cht_bsw_max98090_ti.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
index 20755ec..455a55a 100644
--- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
+++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
@@ -160,7 +160,7 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
return ret;
}
- fmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF
+ fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
| SND_SOC_DAIFMT_CBS_CFS;
ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt);
@@ -173,8 +173,8 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
rate->min = rate->max = 48000;
channels->min = channels->max = 2;
- /* set SSP2 to 24-bit */
- params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
+ /* set SSP2 to 16-bit */
+ params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
return 0;
}
--
2.9.3
next prev parent reply other threads:[~2017-09-08 5:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-08 5:13 [PATCH 0/7] BYT/CHT clocks/max98090 updates Pierre-Louis Bossart
2017-09-08 5:13 ` [PATCH 1/7] ASoC: max98090: reduce verbosity on PLL unlock Pierre-Louis Bossart
2017-09-19 13:45 ` Applied "ASoC: max98090: reduce verbosity on PLL unlock" to the asoc tree Mark Brown
2017-09-08 5:13 ` Pierre-Louis Bossart [this message]
2017-09-08 5:13 ` [PATCH 3/7] ASoC: Intel: cht_bsw_max98090: add support for Baytrail Pierre-Louis Bossart
2017-09-18 7:17 ` Andy Shevchenko
2017-09-18 17:14 ` Pierre-Louis Bossart
2017-09-19 9:51 ` Andy Shevchenko
2017-09-19 13:45 ` Applied "ASoC: Intel: cht_bsw_max98090: add support for Baytrail" to the asoc tree Mark Brown
2017-09-08 5:13 ` [PATCH 4/7] ASoC: Intel: atom: use cht_bsw_max98090 for Baytrail Chromebooks Pierre-Louis Bossart
2017-09-08 5:13 ` [PATCH 5/7] ASoC: ts3a227e: add acpi table Pierre-Louis Bossart
2017-09-08 13:27 ` Vinod Koul
2017-09-08 13:30 ` Pierre-Louis Bossart
2017-09-12 14:54 ` Mark Brown
2017-09-18 3:36 ` Vinod Koul
2017-09-08 5:13 ` [PATCH 6/7] ASoc: Intel: cht_bsw_max98090_ti: Fix jack initialization Pierre-Louis Bossart
2017-09-19 13:45 ` Applied "ASoC: Intel: cht_bsw_max98090_ti: Fix jack initialization" to the asoc tree Mark Brown
2017-09-08 5:13 ` [PATCH 7/7] ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection Pierre-Louis Bossart
2017-09-19 13:45 ` Applied "ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection" to the asoc tree Mark Brown
2017-09-18 3:36 ` [PATCH 0/7] BYT/CHT clocks/max98090 updates Vinod Koul
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