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From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: alsa-devel@alsa-project.org
Cc: tiwai@suse.de,
	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
	liam.r.girdwood@linux.intel.com, vinod.koul@intel.com,
	broonie@kernel.org, jarkko.nikula@linux.intel.com,
	andriy.shevchenko@linux.intel.com
Subject: [PATCH 4/7] ASoC: Intel: atom: use cht_bsw_max98090 for Baytrail Chromebooks
Date: Fri,  8 Sep 2017 00:13:06 -0500	[thread overview]
Message-ID: <20170908051309.19028-5-pierre-louis.bossart@linux.intel.com> (raw)
In-Reply-To: <20170908051309.19028-1-pierre-louis.bossart@linux.intel.com>

Baytrail Chromebooks used to be managed with legacy driver which
is not compatible with atom/sst drivers. Reuse CHT driver to
handle max98098 codec and allow distributions to support all
Atom platforms with the same build.

The legacy byt-max98090 can still be used but in a build for
Baytrail+max98090 only.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
 sound/soc/intel/atom/sst/sst_acpi.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c
index 0e928d5..ff4a517 100644
--- a/sound/soc/intel/atom/sst/sst_acpi.c
+++ b/sound/soc/intel/atom/sst/sst_acpi.c
@@ -536,6 +536,14 @@ static struct sst_acpi_mach sst_acpi_bytcr[] = {
 		.board = "cht-bsw",
 		.pdata = &byt_rvp_platform_data
 	},
+	/* use CHT driver to Baytrail Chromebooks */
+	{
+		.id = "193C9890",
+		.drv_name = "cht-bsw-max98090",
+		.fw_filename = "intel/fw_sst_0f28.bin",
+		.board = "cht-bsw",
+		.pdata = &byt_rvp_platform_data
+	},
 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH)
 	/*
 	 * This is always last in the table so that it is selected only when
-- 
2.9.3

  parent reply	other threads:[~2017-09-08  5:13 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-08  5:13 [PATCH 0/7] BYT/CHT clocks/max98090 updates Pierre-Louis Bossart
2017-09-08  5:13 ` [PATCH 1/7] ASoC: max98090: reduce verbosity on PLL unlock Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: max98090: reduce verbosity on PLL unlock" to the asoc tree Mark Brown
2017-09-08  5:13 ` [PATCH 2/7] ASoC: Intel: cht_bsw_max98090: Fix I2S config + unused code Pierre-Louis Bossart
2017-09-08  5:13 ` [PATCH 3/7] ASoC: Intel: cht_bsw_max98090: add support for Baytrail Pierre-Louis Bossart
2017-09-18  7:17   ` Andy Shevchenko
2017-09-18 17:14     ` Pierre-Louis Bossart
2017-09-19  9:51       ` Andy Shevchenko
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090: add support for Baytrail" to the asoc tree Mark Brown
2017-09-08  5:13 ` Pierre-Louis Bossart [this message]
2017-09-08  5:13 ` [PATCH 5/7] ASoC: ts3a227e: add acpi table Pierre-Louis Bossart
2017-09-08 13:27   ` Vinod Koul
2017-09-08 13:30     ` Pierre-Louis Bossart
2017-09-12 14:54       ` Mark Brown
2017-09-18  3:36       ` Vinod Koul
2017-09-08  5:13 ` [PATCH 6/7] ASoc: Intel: cht_bsw_max98090_ti: Fix jack initialization Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090_ti: Fix jack initialization" to the asoc tree Mark Brown
2017-09-08  5:13 ` [PATCH 7/7] ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection" to the asoc tree Mark Brown
2017-09-18  3:36 ` [PATCH 0/7] BYT/CHT clocks/max98090 updates Vinod Koul

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