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From: Vinod Koul <vinod.koul@intel.com>
To: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Cc: alsa-devel@alsa-project.org, tiwai@suse.de,
	liam.r.girdwood@linux.intel.com, broonie@kernel.org,
	jarkko.nikula@linux.intel.com, andriy.shevchenko@linux.intel.com
Subject: Re: [PATCH 0/7] BYT/CHT clocks/max98090 updates
Date: Mon, 18 Sep 2017 09:06:25 +0530	[thread overview]
Message-ID: <20170918033625.GF30097@localhost> (raw)
In-Reply-To: <20170908051309.19028-1-pierre-louis.bossart@linux.intel.com>

On Fri, Sep 08, 2017 at 12:13:02AM -0500, Pierre-Louis Bossart wrote:
> This patchset corrects issues with an earlier submission (missing
> signoffs, error case not consistent) and enables the cht_bsw_max98090
> machine driver on Baytrail. This should help distributions solve
> problems with Baytrail Chromebooks which required a specific build.
> These patches were tested on Lenovo 100s ('orco'/Baytrail) and Acer
> R11 ('cyan'/Cherrytrail), using the same build based on
> CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m.  Playback on
> speakers/headphone and capture from internal mic work fine. UCM files
> are available at
> https://github.com/plbossart/UCM/tree/master/byt-max98090
> 
> Thanks to Jarkko Nikula and Andy Shevchenko for their comments on an
> initial version reviewed internally at Intel.

Acked-By: Vinod Koul <vinod.koul@intel.com>

> 
> Fang, Yang A (1):
>   ASoC: ts3a227e: add acpi table
> 
> Pierre-Louis Bossart (5):
>   ASoC: max98090: reduce verbosity on PLL unlock
>   ASoC: Intel: cht_bsw_max98090: Fix I2S config + unused code
>   ASoC: Intel: cht_bsw_max98090: add support for Baytrail
>   ASoC: Intel: atom: use cht_bsw_max98090 for Baytrail Chromebooks
>   ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection
> 
> Thierry Escande (1):
>   ASoc: Intel: cht_bsw_max98090_ti: Fix jack initialization
> 
>  sound/soc/codecs/max98090.c                  |   2 +-
>  sound/soc/codecs/ts3a227e.c                  |  10 ++
>  sound/soc/intel/atom/sst/sst_acpi.c          |   8 ++
>  sound/soc/intel/boards/cht_bsw_max98090_ti.c | 185 ++++++++++++++++++++++++---
>  4 files changed, 186 insertions(+), 19 deletions(-)
> 
> -- 
> 2.9.3
> 

-- 
~Vinod

      parent reply	other threads:[~2017-09-18  3:32 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-08  5:13 [PATCH 0/7] BYT/CHT clocks/max98090 updates Pierre-Louis Bossart
2017-09-08  5:13 ` [PATCH 1/7] ASoC: max98090: reduce verbosity on PLL unlock Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: max98090: reduce verbosity on PLL unlock" to the asoc tree Mark Brown
2017-09-08  5:13 ` [PATCH 2/7] ASoC: Intel: cht_bsw_max98090: Fix I2S config + unused code Pierre-Louis Bossart
2017-09-08  5:13 ` [PATCH 3/7] ASoC: Intel: cht_bsw_max98090: add support for Baytrail Pierre-Louis Bossart
2017-09-18  7:17   ` Andy Shevchenko
2017-09-18 17:14     ` Pierre-Louis Bossart
2017-09-19  9:51       ` Andy Shevchenko
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090: add support for Baytrail" to the asoc tree Mark Brown
2017-09-08  5:13 ` [PATCH 4/7] ASoC: Intel: atom: use cht_bsw_max98090 for Baytrail Chromebooks Pierre-Louis Bossart
2017-09-08  5:13 ` [PATCH 5/7] ASoC: ts3a227e: add acpi table Pierre-Louis Bossart
2017-09-08 13:27   ` Vinod Koul
2017-09-08 13:30     ` Pierre-Louis Bossart
2017-09-12 14:54       ` Mark Brown
2017-09-18  3:36       ` Vinod Koul
2017-09-08  5:13 ` [PATCH 6/7] ASoc: Intel: cht_bsw_max98090_ti: Fix jack initialization Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090_ti: Fix jack initialization" to the asoc tree Mark Brown
2017-09-08  5:13 ` [PATCH 7/7] ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection Pierre-Louis Bossart
2017-09-19 13:45   ` Applied "ASoC: Intel: cht_bsw_max98090: add gpio-based jack detection" to the asoc tree Mark Brown
2017-09-18  3:36 ` Vinod Koul [this message]

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