From: Hans de Goede <hdegoede@redhat.com>
To: Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Bard Liao <bardliao@realtek.com>,
Oder Chiou <oder_chiou@realtek.com>,
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
alsa-devel@alsa-project.org, Takashi Iwai <tiwai@suse.com>
Subject: [PATCH] ASoC: Intel: bytcr_rt5640: Fix compile error
Date: Fri, 11 May 2018 11:52:16 +0200 [thread overview]
Message-ID: <20180511095216.11203-1-hdegoede@redhat.com> (raw)
Fix the compile error introduced by: "ASoC: Intel: bytcr_rt5640:
Configure PLL1 before using it".
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Mark, feel free to squash this into the original commit
---
sound/soc/intel/boards/bytcr_rt5640.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c
index 493240194991..828be866fb00 100644
--- a/sound/soc/intel/boards/bytcr_rt5640.c
+++ b/sound/soc/intel/boards/bytcr_rt5640.c
@@ -210,14 +210,14 @@ static int byt_rt5640_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
}
if (ret < 0) {
- dev_err(codec_dai->codec->dev, "can't set pll: %d\n", ret);
+ dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
return ret;
}
ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
rate * 512, SND_SOC_CLOCK_IN);
if (ret < 0) {
- dev_err(codec_dai->codec->dev, "can't set clock %d\n", ret);
+ dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
return ret;
}
--
2.17.0
next reply other threads:[~2018-05-11 9:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 9:52 Hans de Goede [this message]
2018-05-13 2:32 ` Applied "ASoC: Intel: bytcr_rt5640: Fix compile error" to the asoc tree Mark Brown
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