[alsa-devel] [RFC PATCH 18/34] ASoC: sun8i-codec: Allow all clock inversion permutations

Samuel Holland
2020-02-17T06:54:06Z

Since the hardware has separate bits for BCLK and LRCK inversion, we can
support any combination of normal and inverted clocks.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
sound/soc/sunxi/sun8i-codec.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c
index 36ce281286b5..f8cde149a92b 100644
--- a/sound/soc/sunxi/sun8i-codec.c
+++ b/sound/soc/sunxi/sun8i-codec.c
@@ -41,8 +41,7 @@
#define SUN8I_SYS_SR_CTRL_AIF2_FS 8
#define SUN8I_AIF1CLK_CTRL 0x040
#define SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD 15
-#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV 14
-#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV 13
+#define SUN8I_AIF1CLK_CTRL_AIF1_CLK_INV 13
#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV 9
#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV 6
#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ 4
@@ -81,6 +80,7 @@

#define SUN8I_SYS_SR_CTRL_AIF1_FS_MASK GENMASK(15, 12)
#define SUN8I_SYS_SR_CTRL_AIF2_FS_MASK GENMASK(11, 8)
+#define SUN8I_AIF1CLK_CTRL_AIF1_CLK_INV_MASK GENMASK(14, 13)
#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV_MASK GENMASK(12, 9)
#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV_MASK GENMASK(8, 6)
#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ_MASK GENMASK(5, 4)
@@ -205,16 +205,18 @@ static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
case SND_SOC_DAIFMT_NB_NF: /* Normal */
value = 0x0;
break;
- case SND_SOC_DAIFMT_IB_IF: /* Inversion */
+ case SND_SOC_DAIFMT_NB_IF: /* Inverted LRCK */
value = 0x1;
break;
+ case SND_SOC_DAIFMT_IB_NF: /* Inverted BCLK */
+ value = 0x2;
+ break;
+ case SND_SOC_DAIFMT_IB_IF: /* Both inverted */
+ value = 0x3;
+ break;
default:
return -EINVAL;
}
- regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
- BIT(SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV),
- value << SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV);
-
/*
* It appears that the DAI and the codec in the A33 SoC don't
* share the same polarity for the LRCK signal when they mean
@@ -227,8 +229,8 @@ static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
*/
value ^= scodec->inverted_lrck;
regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
- BIT(SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV),
- value << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV);
+ SUN8I_AIF1CLK_CTRL_AIF1_CLK_INV_MASK,
+ value << SUN8I_AIF1CLK_CTRL_AIF1_CLK_INV);

/* DAI format */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {