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[213.245.241.245]) by smtp.gmail.com with ESMTPSA id j24sm18657373wrd.43.2020.07.04.04.39.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Jul 2020 04:39:07 -0700 (PDT) From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , Mark Brown , Liam Girdwood Subject: [PATCH 02/16] ASoC: sun4i-i2s: Adjust LRCLK width Date: Sat, 4 Jul 2020 13:38:48 +0200 Message-Id: <20200704113902.336911-3-peron.clem@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200704113902.336911-1-peron.clem@gmail.com> References: <20200704113902.336911-1-peron.clem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: devicetree@vger.kernel.org, Jernej Skrabec , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Takashi Iwai , Marcus Cooper , linux-sunxi@googlegroups.com, =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= , Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Marcus Cooper Some codecs such as i2s based HDMI audio and the Pine64 DAC require a different amount of bit clocks per frame than what is calculated by the sample width. Use the values obtained by the tdm slot bindings to adjust the LRCLK width accordingly. Signed-off-by: Marcus Cooper Signed-off-by: Clément Péron Acked-by: Maxime Ripard --- sound/soc/sunxi/sun4i-i2s.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 9690389cb68e..8bae97efea30 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -470,6 +470,9 @@ static int sun8i_i2s_set_chan_cfg(const struct sun4i_i2s *i2s, return -EINVAL; } + if (i2s->slot_width) + lrck_period = i2s->slot_width; + regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, SUN8I_I2S_FMT0_LRCK_PERIOD_MASK, SUN8I_I2S_FMT0_LRCK_PERIOD(lrck_period)); -- 2.25.1