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From: Cezary Rojewski <cezary.rojewski@intel.com>
To: alsa-devel@alsa-project.org
Cc: pierre-louis.bossart@linux.intel.com,
	Cezary Rojewski <cezary.rojewski@intel.com>,
	andriy.shevchenko@intel.com, filip.kaczmarski@intel.com,
	harshapriya.n@intel.com, marcin.barlik@intel.com,
	zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com,
	filip.proborszcz@intel.com, broonie@kernel.org,
	michal.wasko@intel.com, cujomalainey@chromium.org,
	ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com
Subject: [PATCH 07/13] ASoC: Intel: catpt: Event tracing
Date: Fri,  7 Aug 2020 13:06:43 +0200	[thread overview]
Message-ID: <20200807110649.17114-8-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20200807110649.17114-1-cezary.rojewski@intel.com>

Define tracing macros for easy catpt debug. These are divided into
memory, registry and ipc event categories.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 sound/soc/intel/catpt/trace.h | 169 ++++++++++++++++++++++++++++++++++
 1 file changed, 169 insertions(+)
 create mode 100644 sound/soc/intel/catpt/trace.h

diff --git a/sound/soc/intel/catpt/trace.h b/sound/soc/intel/catpt/trace.h
new file mode 100644
index 000000000000..92f79667b73b
--- /dev/null
+++ b/sound/soc/intel/catpt/trace.h
@@ -0,0 +1,169 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright(c) 2020 Intel Corporation. All rights reserved.
+ *
+ * Author: Cezary Rojewski <cezary.rojewski@intel.com>
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM intel_catpt
+
+#if !defined(__SND_SOC_INTEL_CATPT_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
+#define __SND_SOC_INTEL_CATPT_TRACE_H
+
+#include <linux/types.h>
+#include <linux/tracepoint.h>
+
+struct catpt_mbank;
+struct catpt_mregion;
+
+TRACE_EVENT(catpt_mbank,
+	TP_PROTO(struct catpt_mbank *sram, const char *action,
+		 u32 start, u32 end),
+
+	TP_ARGS(sram, action, start, end),
+
+	TP_STRUCT__entry(
+		__field(u32, bank_start)
+		__field(u32, bank_end)
+		__string(action, action)
+		__field(u32, start)
+		__field(u32, end)
+	),
+
+	TP_fast_assign(
+		__entry->bank_start = sram->start;
+		__entry->bank_end = sram->end;
+		__assign_str(action, action);
+		__entry->start = start;
+		__entry->end = end;
+	),
+
+	TP_printk("[0x%08x-%08x] %s 0x%08x-%08x",
+		  __entry->bank_start, __entry->bank_end,
+		  __get_str(action),
+		  __entry->start, __entry->end)
+);
+
+TRACE_EVENT(catpt_mregion,
+	TP_PROTO(struct catpt_mregion *r1, struct catpt_mregion *r2,
+		 const char *action),
+
+	TP_ARGS(r1, r2, action),
+
+	TP_STRUCT__entry(
+		__field(u32, r1_start)
+		__field(u32, r1_end)
+		__field(u32, r2_start)
+		__field(u32, r2_end)
+		__string(action, action)
+	),
+
+	TP_fast_assign(
+		__entry->r1_start = r1->start;
+		__entry->r1_end = r1->end;
+		__entry->r2_start = r2->start;
+		__entry->r2_end = r2->end;
+		__assign_str(action, action);
+	),
+
+	TP_printk("0x%08x-%08x %s 0x%08x-%08x",
+		  __entry->r1_start, __entry->r1_end,
+		  __get_str(action),
+		  __entry->r2_start, __entry->r2_end)
+);
+
+TRACE_EVENT(catpt_updatel,
+
+	TP_PROTO(const char *title, u32 mask, u32 old, u32 new),
+
+	TP_ARGS(title, mask, old, new),
+
+	TP_STRUCT__entry(
+		__string(title, title)
+		__field(u32, mask)
+		__field(u32, old)
+		__field(u32, new)
+	),
+
+	TP_fast_assign(
+		__assign_str(title, title);
+		__entry->mask = mask;
+		__entry->old = old;
+		__entry->new = new;
+	),
+
+	TP_printk("%s [0x%08x] 0x%08x -> 0x%08x",
+		  __get_str(title),
+		  __entry->mask,
+		  __entry->old,
+		  __entry->new)
+);
+
+DECLARE_EVENT_CLASS(catpt_ipc_msg,
+
+	TP_PROTO(u32 header),
+
+	TP_ARGS(header),
+
+	TP_STRUCT__entry(
+		__field(u32, header)
+	),
+
+	TP_fast_assign(
+		__entry->header = header;
+	),
+
+	TP_printk("0x%08x", __entry->header)
+);
+
+DEFINE_EVENT(catpt_ipc_msg, catpt_irq,
+	TP_PROTO(u32 header),
+	TP_ARGS(header)
+);
+
+DEFINE_EVENT(catpt_ipc_msg, catpt_ipc_request,
+	TP_PROTO(u32 header),
+	TP_ARGS(header)
+);
+
+DEFINE_EVENT(catpt_ipc_msg, catpt_ipc_reply,
+	TP_PROTO(u32 header),
+	TP_ARGS(header)
+);
+
+DEFINE_EVENT(catpt_ipc_msg, catpt_ipc_notify,
+	TP_PROTO(u32 header),
+	TP_ARGS(header)
+);
+
+TRACE_EVENT_CONDITION(catpt_ipc_payload,
+
+	TP_PROTO(const u8 *data, size_t size),
+
+	TP_ARGS(data, size),
+
+	TP_CONDITION(data && size),
+
+	TP_STRUCT__entry(
+		__dynamic_array(u8, buf, size)
+	),
+
+	TP_fast_assign(
+		memcpy(__get_dynamic_array(buf), data, size);
+	),
+
+	TP_printk("%u byte(s)%s",
+		  __get_dynamic_array_len(buf),
+		  __print_hex_dump("", DUMP_PREFIX_NONE, 16, 4,
+				   __get_dynamic_array(buf),
+				   __get_dynamic_array_len(buf), false))
+);
+
+#endif /* __SND_SOC_INTEL_CATPT_TRACE_H */
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#define TRACE_INCLUDE_FILE trace
+#include <trace/define_trace.h>
-- 
2.17.1


  parent reply	other threads:[~2020-08-07 11:12 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-07 11:06 [PATCH 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Cezary Rojewski
2020-08-07 11:06 ` [PATCH 01/13] ASoC: Intel: Add catpt device Cezary Rojewski
2020-08-08 11:50   ` Andy Shevchenko
2020-08-11 10:04     ` Cezary Rojewski
2020-08-07 11:06 ` [PATCH 02/13] ASoC: Intel: catpt: Define DSP operations Cezary Rojewski
2020-08-07 11:06 ` [PATCH 03/13] ASoC: Intel: catpt: Firmware loading and context restore Cezary Rojewski
2020-08-07 11:06 ` [PATCH 04/13] ASoC: Intel: catpt: Implement IPC protocol Cezary Rojewski
2020-08-07 11:06 ` [PATCH 05/13] ASoC: Intel: catpt: Add IPC messages Cezary Rojewski
2020-08-07 11:06 ` [PATCH 06/13] ASoC: Intel: catpt: PCM operations Cezary Rojewski
2020-08-07 11:06 ` Cezary Rojewski [this message]
2020-08-07 15:09   ` [PATCH 07/13] ASoC: Intel: catpt: Event tracing Mark Brown
2020-08-10  7:16     ` Cezary Rojewski
2020-08-11  7:30       ` Cezary Rojewski
2020-08-11  9:40         ` Mark Brown
2020-08-07 11:06 ` [PATCH 08/13] ASoC: Intel: catpt: Simple sysfs attributes Cezary Rojewski
2020-08-07 15:00   ` Mark Brown
2020-08-10  7:17     ` Cezary Rojewski
2020-08-07 11:06 ` [PATCH 09/13] ASoC: Intel: Select catpt and deprecate haswell Cezary Rojewski
2020-08-07 11:06 ` [PATCH 10/13] ASoC: Intel: haswell: Remove haswell-solution specific code Cezary Rojewski
2020-08-07 11:06 ` [PATCH 11/13] ASoC: Intel: broadwell: " Cezary Rojewski
2020-08-07 11:06 ` [PATCH 12/13] ASoC: Intel: bdw-5650: " Cezary Rojewski
2020-08-07 11:06 ` [PATCH 13/13] ASoC: Intel: bdw-5677: " Cezary Rojewski
2020-08-07 11:09 ` [PATCH 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Cezary Rojewski
2020-08-07 13:05 ` Amadeusz Sławiński

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