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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id u2sm3883917pji.50.2020.09.16.18.47.38 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Sep 2020 18:47:38 -0700 (PDT) Date: Wed, 16 Sep 2020 18:44:27 -0700 From: Nicolin Chen To: Shengjiu Wang Subject: Re: [PATCH 1/3] ASoC: fsl_sai: Add new added registers and new bit definition Message-ID: <20200917014426.GB22566@Asurada-Nvidia> References: <1600251387-1863-1-git-send-email-shengjiu.wang@nxp.com> <1600251387-1863-2-git-send-email-shengjiu.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1600251387-1863-2-git-send-email-shengjiu.wang@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Cc: alsa-devel@alsa-project.org, timur@kernel.org, Xiubo.Lee@gmail.com, lgirdwood@gmail.com, linuxppc-dev@lists.ozlabs.org, tiwai@suse.com, broonie@kernel.org, festevam@gmail.com, linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Wed, Sep 16, 2020 at 06:16:25PM +0800, Shengjiu Wang wrote: > On i.MX850/i.MX815/i.MX845 platform, the sai IP is upgraded. > There are some new registers and new bit definition. This > patch is to complete the register list. > > Signed-off-by: Shengjiu Wang Change itself looks good. Can add once fixing the commit message: Acked-by: Nicolin Chen