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h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XSHXoOvkB/4V5O2zciwXkHEaYsjkdo3mIz7z/jvwnlEMR8ePy+zpuKj0lwk7Kgosl q26ZrNPGT8RLXXflGEyDxK7csHXpN+fs9XFCcQvTiGsHPLup2xPlS5x69jgJbjkO8D psWHT9UFYsLvknqD97/vGMzYfwG6lm1rZQIG41ydfQ73EQ8WWRGRrekWllJ190hop9 sQOIuP4TUCAnEkpHUHwMx2F3I0F53/o3q3RQ8l8w7W36MfQpN/Nbytwx3m8lcBtXeA YHN1dh19GYdvnb2ozt3nrANBmrqyPDcCNSsMWKlPJcuk6xSoE9A43t5F+f4U9i3v0+ 9TQEwGcMdwTzg== To: broonie@kernel.org, srinivas.kandagatla@linaro.org Date: Fri, 4 Jun 2021 22:22:03 -0400 Message-Id: <20210605022206.13226-2-ultracoolguy@disroot.org> In-Reply-To: <20210605022206.13226-1-ultracoolguy@disroot.org> References: <20210605022206.13226-1-ultracoolguy@disroot.org> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 198.145.29.99 X-SA-Exim-Mail-From: SRS0=4y+g=K7=disroot.org=ultracoolguy@kernel.org Subject: [PATCH 1/4] ASoC: q6afe: dt-bindings: Add QUIN_MI2S_RX/TX X-SA-Exim-Version: 4.2.1 (built Sat, 13 Feb 2021 17:57:42 +0000) X-SA-Exim-Scanned: No (on cassiel.sirena.org.uk); Unknown failure X-TUID: Vch8kDEaDfuc X-Mailman-Approved-At: Tue, 15 Jun 2021 11:51:53 +0200 Cc: alsa-devel@alsa-project.org, Gabriel David X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" This patch adds bindings required for Quinary MI2S ports on AFE. Signed-off-by: Gabriel David --- include/dt-bindings/sound/qcom,q6afe.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/sound/qcom,q6afe.h b/include/dt-bindings/sound/qcom,q6afe.h index f64b5d2e6efd..66c21ab03eef 100644 --- a/include/dt-bindings/sound/qcom,q6afe.h +++ b/include/dt-bindings/sound/qcom,q6afe.h @@ -129,6 +129,8 @@ #define TX_CODEC_DMA_TX_5 124 #define RX_CODEC_DMA_RX_6 125 #define RX_CODEC_DMA_RX_7 126 +#define QUINARY_MI2S_RX 127 +#define QUINARY_MI2S_TX 128 #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 -- 2.31.1