From: Cezary Rojewski <cezary.rojewski@intel.com>
To: alsa-devel@alsa-project.org
Cc: Cezary Rojewski <cezary.rojewski@intel.com>,
rad@semihalf.com, upstream@semihalf.com, harshapriya.n@intel.com,
tiwai@suse.com, pierre-louis.bossart@linux.intel.com,
hdegoede@redhat.com, broonie@kernel.org,
ranjani.sridharan@linux.intel.com,
amadeuszx.slawinski@linux.intel.com, cujomalainey@chromium.org,
lma@semihalf.com
Subject: [PATCH v4 06/17] ASoC: Intel: avs: Add pipeline management requests
Date: Wed, 9 Mar 2022 21:40:18 +0100 [thread overview]
Message-ID: <20220309204029.89040-7-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20220309204029.89040-1-cezary.rojewski@intel.com>
Pipeline represents a scheduling entity. Their existence as well as
their state machine is controlled through CREATE_PIPELINE,
DELETE_PIPELINE and SET_PIPELINE_STATE IPCs.
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
sound/soc/intel/avs/messages.c | 76 ++++++++++++++++++++++++++++++++++
sound/soc/intel/avs/messages.h | 48 +++++++++++++++++++++
2 files changed, 124 insertions(+)
diff --git a/sound/soc/intel/avs/messages.c b/sound/soc/intel/avs/messages.c
index d568338b0737..de2d50f8c6b4 100644
--- a/sound/soc/intel/avs/messages.c
+++ b/sound/soc/intel/avs/messages.c
@@ -63,3 +63,79 @@ int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id)
return ret;
}
+
+int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
+ u8 instance_id, bool lp, u16 attributes)
+{
+ union avs_global_msg msg = AVS_GLOBAL_REQUEST(CREATE_PIPELINE);
+ struct avs_ipc_msg request = {{0}};
+ int ret;
+
+ msg.create_ppl.ppl_mem_size = req_size;
+ msg.create_ppl.ppl_priority = priority;
+ msg.create_ppl.instance_id = instance_id;
+ msg.ext.create_ppl.lp = lp;
+ msg.ext.create_ppl.attributes = attributes;
+ request.header = msg.val;
+
+ ret = avs_dsp_send_msg(adev, &request, NULL);
+ if (ret)
+ avs_ipc_err(adev, &request, "create pipeline", ret);
+
+ return ret;
+}
+
+int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id)
+{
+ union avs_global_msg msg = AVS_GLOBAL_REQUEST(DELETE_PIPELINE);
+ struct avs_ipc_msg request = {{0}};
+ int ret;
+
+ msg.ppl.instance_id = instance_id;
+ request.header = msg.val;
+
+ ret = avs_dsp_send_msg(adev, &request, NULL);
+ if (ret)
+ avs_ipc_err(adev, &request, "delete pipeline", ret);
+
+ return ret;
+}
+
+int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id,
+ enum avs_pipeline_state state)
+{
+ union avs_global_msg msg = AVS_GLOBAL_REQUEST(SET_PIPELINE_STATE);
+ struct avs_ipc_msg request = {{0}};
+ int ret;
+
+ msg.set_ppl_state.ppl_id = instance_id;
+ msg.set_ppl_state.state = state;
+ request.header = msg.val;
+
+ ret = avs_dsp_send_msg(adev, &request, NULL);
+ if (ret)
+ avs_ipc_err(adev, &request, "set pipeline state", ret);
+
+ return ret;
+}
+
+int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id,
+ enum avs_pipeline_state *state)
+{
+ union avs_global_msg msg = AVS_GLOBAL_REQUEST(GET_PIPELINE_STATE);
+ struct avs_ipc_msg request = {{0}};
+ struct avs_ipc_msg reply = {{0}};
+ int ret;
+
+ msg.get_ppl_state.ppl_id = instance_id;
+ request.header = msg.val;
+
+ ret = avs_dsp_send_msg(adev, &request, &reply);
+ if (ret) {
+ avs_ipc_err(adev, &request, "get pipeline state", ret);
+ return ret;
+ }
+
+ *state = reply.rsp.ext.get_ppl_state.state;
+ return ret;
+}
diff --git a/sound/soc/intel/avs/messages.h b/sound/soc/intel/avs/messages.h
index b9ec1c64179b..c1bf1cff54d9 100644
--- a/sound/soc/intel/avs/messages.h
+++ b/sound/soc/intel/avs/messages.h
@@ -26,6 +26,10 @@ enum avs_msg_direction {
enum avs_global_msg_type {
AVS_GLB_LOAD_MULTIPLE_MODULES = 15,
AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16,
+ AVS_GLB_CREATE_PIPELINE = 17,
+ AVS_GLB_DELETE_PIPELINE = 18,
+ AVS_GLB_SET_PIPELINE_STATE = 19,
+ AVS_GLB_GET_PIPELINE_STATE = 20,
AVS_GLB_LOAD_LIBRARY = 24,
AVS_GLB_NOTIFICATION = 27,
};
@@ -45,6 +49,23 @@ union avs_global_msg {
struct {
u32 mod_cnt:8;
} load_multi_mods;
+ /* pipeline management */
+ struct {
+ u32 ppl_mem_size:11;
+ u32 ppl_priority:5;
+ u32 instance_id:8;
+ } create_ppl;
+ struct {
+ u32 rsvd:16;
+ u32 instance_id:8;
+ } ppl; /* generic ppl request */
+ struct {
+ u32 state:16;
+ u32 ppl_id:8;
+ } set_ppl_state;
+ struct {
+ u32 ppl_id:8;
+ } get_ppl_state;
/* library loading */
struct {
u32 dma_id:5;
@@ -54,6 +75,12 @@ union avs_global_msg {
};
union {
u32 val;
+ /* pipeline management */
+ struct {
+ u32 lp:1; /* low power flag */
+ u32 rsvd:3;
+ u32 attributes:16; /* additional scheduling flags */
+ } create_ppl;
} ext;
};
} __packed;
@@ -101,6 +128,10 @@ union avs_reply_msg {
struct {
u32 err_mod_id:16;
} load_multi_mods;
+ /* pipeline management */
+ struct {
+ u32 state:5;
+ } get_ppl_state;
} ext;
};
} __packed;
@@ -189,4 +220,21 @@ int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id);
+/* Pipeline management messages */
+enum avs_pipeline_state {
+ AVS_PPL_STATE_INVALID,
+ AVS_PPL_STATE_UNINITIALIZED,
+ AVS_PPL_STATE_RESET,
+ AVS_PPL_STATE_PAUSED,
+ AVS_PPL_STATE_RUNNING,
+};
+
+int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
+ u8 instance_id, bool lp, u16 attributes);
+int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id);
+int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id,
+ enum avs_pipeline_state state);
+int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id,
+ enum avs_pipeline_state *state);
+
#endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */
--
2.25.1
next prev parent reply other threads:[~2022-03-09 20:33 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-09 20:40 [PATCH v4 00/17] ASoC: Intel: AVS - Audio DSP for cAVS Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 01/17] ALSA: hda: Add helper macros for DSP capable devices Cezary Rojewski
2022-03-10 13:30 ` Takashi Iwai
2022-03-09 20:40 ` [PATCH v4 02/17] ASoC: Export DAI register and widget ctor and dctor functions Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 03/17] ASoC: Intel: Introduce AVS driver Cezary Rojewski
2022-03-09 21:58 ` Pierre-Louis Bossart
2022-03-11 15:32 ` Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 04/17] ASoC: Intel: avs: Inter process communication Cezary Rojewski
2022-03-09 22:10 ` Pierre-Louis Bossart
2022-03-11 15:40 ` Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 05/17] ASoC: Intel: avs: Add code loading requests Cezary Rojewski
2022-03-09 20:40 ` Cezary Rojewski [this message]
2022-03-09 20:40 ` [PATCH v4 07/17] ASoC: Intel: avs: Add module management requests Cezary Rojewski
2022-03-09 22:16 ` Pierre-Louis Bossart
2022-03-11 15:40 ` Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 08/17] ASoC: Intel: avs: Add power " Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 09/17] ASoC: Intel: avs: Add ROM requests Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 10/17] ASoC: Intel: avs: Add basefw runtime-parameter requests Cezary Rojewski
2022-03-09 22:20 ` Pierre-Louis Bossart
2022-03-09 20:40 ` [PATCH v4 11/17] ASoC: Intel: avs: Firmware resources management utilities Cezary Rojewski
2022-03-09 22:36 ` Pierre-Louis Bossart
2022-03-10 17:11 ` Cezary Rojewski
2022-03-11 12:10 ` Mark Brown
2022-03-11 15:28 ` Cezary Rojewski
2022-03-11 15:46 ` Cezary Rojewski
2022-03-11 15:59 ` Pierre-Louis Bossart
2022-03-11 17:20 ` Cezary Rojewski
2022-03-11 20:30 ` Pierre-Louis Bossart
2022-03-14 17:59 ` Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 12/17] ASoC: Intel: avs: Declare module configuration types Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 13/17] ASoC: Intel: avs: Dynamic firmware resources management Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 14/17] ASoC: Intel: avs: General code loading flow Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 15/17] ASoC: Intel: avs: Implement CLDMA transfer Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 16/17] ASoC: Intel: avs: Code loading over CLDMA Cezary Rojewski
2022-03-09 20:40 ` [PATCH v4 17/17] ASoC: Intel: avs: Code loading over HDA Cezary Rojewski
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