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dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=gWsv+BT5 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D439060B08; Sat, 29 Jul 2023 10:13:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 03D28C433C7; Sat, 29 Jul 2023 10:13:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690625594; bh=e5qRP58sXUjxxjVtvykFY2nDh4nODzU0OW9ZJXKMiHc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=gWsv+BT5TiVW2HgwHrYaki7yauIZECpn8pjC0wHgTOGA/SvdFagSy9B7PNPhMSQ4z /3Hvriu2otr2fI7ysVxMGeEvUHdjxv6O07ope55PNwXE2fdoyBLjRDg7EzWGZrE5VG I0pXWVTxNXLXk/1J4USlWHds3gU1CvIvj00AbM4VgM2UyMkouGsxyGt/eCHK56+ftU QvlxzxaX3v0VV6JatvSC1nCHZySG5Yv/Mr4YtKCTv4+ZsdowJU9jHIoW6en74g8brT pVOarJvHkkpkEiCV6tEHe3K2y5ybLMSqWy2Ayr9jiQJ+1Zl0eRNMjLi68eS5gK4CEs 0qvH+V466Mxkw== Date: Sat, 29 Jul 2023 11:13:09 +0100 From: Conor Dooley To: Varshini Rajendran Cc: claudiu.beznea@microchip.com, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, codrin.ciubotariu@microchip.com, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 31/50] ASoC: dt-bindings: microchip: add sam9x7 Message-ID: <20230729-contently-gopher-27c3ee182aaa@spud> References: <20230728102828.266861-1-varshini.rajendran@microchip.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="jbAX9C9n+mrlLIx0" Content-Disposition: inline In-Reply-To: <20230728102828.266861-1-varshini.rajendran@microchip.com> Message-ID-Hash: CVIIAGDBJAT5OAJ2AGHV6QJ343O6Y453 X-Message-ID-Hash: CVIIAGDBJAT5OAJ2AGHV6QJ343O6Y453 X-MailFrom: conor@kernel.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: --jbAX9C9n+mrlLIx0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 28, 2023 at 03:58:28PM +0530, Varshini Rajendran wrote: > Add sam9x7 compatible in the DT documentation. >=20 > Signed-off-by: Varshini Rajendran > --- > .../bindings/sound/microchip,sama7g5-i2smcc.yaml | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) >=20 > diff --git a/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2= smcc.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smc= c.yaml > index 651f61c7c25a..fb630a184350 100644 > --- a/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.ya= ml > +++ b/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.ya= ml > @@ -24,9 +24,14 @@ properties: > const: 0 > =20 > compatible: > - enum: > - - microchip,sam9x60-i2smcc > - - microchip,sama7g5-i2smcc > + oneOf: > + - enum: > + - microchip,sam9x60-i2smcc > + - microchip,sama7g5-i2smcc > + - items: > + - enum: > + - microchip,sam9x7-i2smcc > + - const: microchip,sam9x60-i2smcc Acked-by: Conor Dooley Thanks, Conor. --jbAX9C9n+mrlLIx0 Content-Type: application/pgp-signature; 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