Re: ALSA: dice: improve support for Weiss devices

[Takashi Sakamoto <o-takashi@sakamocchi.jp>]

Hi,

Sorry for my late reply, but I'm in short summer vacation in my country
side (less connections to internet). Would you please wait for any
reaction within a few days.


Regards

Takashi Sakamoto

On Wed, Aug 16, 2023 at 03:05:36PM +0200, Michele Perrone wrote:
>    Dear Mr. Sakamoto,
> 
>    since we are not discussing about the patch anymore, let me reply to
>    our
>    open threads in a separate message.
> 
>    On 08/08/23 17:25, Takashi Sakamoto wrote:
> 
> As a policy to maintain current ALSA firewire stack, any code for control
> function is out of kernel land, thus your AVC function can not to be
> merged to Linux upstream as is.
> 
> I think the most convenient way is to provide source code for the
> AVC function to me. Then I re-implement it by Rust language for
> snd-dice-ctl-service program. As long as interpreting original code, we
> have no license issue for the new code.
> 
>    That is very kind of you. You can now find our current AVC code in the
>    following public repository (branch 'avc'):
>    [1]https://github.com/weiss-engineering/snd-dice/tree/avc
>    If you have questions about the code, also on the firmware side of
>    things,
>    feel free to ask.
> 
> But As a first step, I would like you to assist my support for DICE common
> controls in your models.
> I need the `clock caps` and `clock source names` fields to implement the
> common controls for your device in snd-firewire-ctl-services.
> 
>    You can find the `clock caps` and `clock source names` fields for all
>    our Firewire devices below. As I currently do not have access to our
>    Firewire hardware except for MAN301, DAC202, and INT202, for the
>    remaining devices I copied the fields from their latest firmware source
>    code. -- MAN301 -- clock caps: 44100 48000 88200 96000 176400 192000
>    aes1 aes2 aes3 wc internal clock source names: AES/EBU (XLR)\S/PDIF
>    (RCA)\S/PDIF (TOS)\Unused\Unused\Unused\Unused\Word Clock
>    (BNC)\Unused\Unused\Unused\Unused\Internal\\ -- DAC202 -- clock caps:
>    44100 48000 88200 96000 176400 192000 aes1 aes2 aes3 wc arx1 internal
>    clock source names: AES/EBU (XLR)\S/PDIF (RCA)\S/PDIF
>    (TOSLINK)\Unused\Unused\Unused\Unused\Word
>    Clock\Unused\Unused\Unused\Unused\Internal\\ -- INT202 -- clock caps:
>    44100 48000 88200 96000 176400 192000 arx1 internal clock source names:
>    Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\U
>    nused\Unused\Internal\\ -- INT203 -- clock caps: 44100 48000 88200
>    96000 176400 192000 aes1 aes2 arx1 internal clock source names: AES/EBU
>    (XLR)\S/PDIF
>    (RCA)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Un
>    used\Internal\\ -- ADC2 -- clock caps: 44100 48000 88200 96000 176400
>    192000 aes1 clock source names:
>    AES12\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Un
>    used\Unused\Unused\\ -- DAC2/Minerva -- clock caps: 44100 48000 88200
>    96000 176400 192000 aes1 aes2 aes3 arx1 internal clock source names:
>    AES/EBU (XLR)\S/PDIF (RCA)\S/PDIF
>    (TOSLINK)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unuse
>    d\Internal\\ -- Vesta -- clock caps: 44100 48000 88200 96000 176400
>    192000 aes1 aes2 aes3 arx1 internal clock source names: AES/EBU
>    (XLR)\S/PDIF (RCA)\S/PDIF
>    (TOSLINK)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unuse
>    d\Internal\\ -- AFI1 -- clock caps: 44100 48000 88200 96000 176400
>    192000 aes1 aes2 aes3 aes4 adat wc internal clock source names:
>    AES12\AES34\AES56\AES78\Unused\ADAT\Unused\Word
>    Clock\Unused\Unused\Unused\Unused\Internal\\
> 
> In my point of view, we need to decide license under which the file of
> configuration ROM image is public. I think CC0[0] is bette for our case.
> 
>    I have created a pull request in takaswie/am-config-roms with three ROM
>    images: MAN301, DAC202, INT202. I cannot extract the remaining images
>    at
>    the moment, because I do not have all Firewire devices available. I
>    will
>    add the remaining images as soon as I can get my hands on them.
> 
>    Kind regards,
>    Michele Perrone
> 
> 参照
> 
>    1. https://github.com/weiss-engineering/snd-dice/tree/avc