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[109.252.193.52]) by smtp.googlemail.com with ESMTPSA id r11sm1638373lfn.30.2021.03.04.01.42.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Mar 2021 01:42:30 -0800 (PST) Subject: Re: [PATCH v1 5/5] ASoC: tegra30: i2s: Add reset control To: Philipp Zabel , Thierry Reding , Jonathan Hunter , Mark Brown , Takashi Iwai , Jaroslav Kysela , Paul Fertser References: <20210302112123.24161-1-digetx@gmail.com> <20210302112123.24161-6-digetx@gmail.com> From: Dmitry Osipenko Message-ID: <26e504b7-1077-d43b-07c7-abe2bcf50cc4@gmail.com> Date: Thu, 4 Mar 2021 12:42:29 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" 03.03.2021 15:09, Philipp Zabel пишет: > Hi Dmitry, > > On Wed, 2021-03-03 at 11:28 +0300, Dmitry Osipenko wrote: >> 02.03.2021 14:21, Dmitry Osipenko пишет: >>> The I2S reset may be asserted at a boot time. Tegra30 I2S driver doesn't >>> manage the reset control and currently it happens to work because reset >>> is implicitly deasserted by the Tegra AHUB driver, but the reset of I2C >>> controller should be synchronous and I2S clock is disabled when AHUB is >>> reset. Add reset control to the Tegra30 I2S driver. >>> >>> Note that I2S reset was always specified in Tegra30+ device-trees, hence >>> DTB ABI changes aren't required. Also note that AHUB touches I2S resets, >>> hence AHUB resets are now requested in a released state, allowing both >>> drivers to control the I2S resets together. >>> >>> Signed-off-by: Dmitry Osipenko >>> --- >>> sound/soc/tegra/tegra30_ahub.c | 14 ++++++++++--- >>> sound/soc/tegra/tegra30_i2s.c | 36 +++++++++++++++++++++++++++++++++- >>> sound/soc/tegra/tegra30_i2s.h | 1 + >>> 3 files changed, 47 insertions(+), 4 deletions(-) >> >> ... >>> @@ -579,7 +587,7 @@ static int tegra30_ahub_probe(struct platform_device *pdev) >>> if (ret) >>> return ret; >>> >>> - ahub->reset = devm_reset_control_array_get_exclusive(&pdev->dev); >>> + ahub->reset = devm_reset_control_array_get_exclusive_released(&pdev->dev); >> >> Thinking a bit more about this, it looks like we actually want something >> like: >> >> devm_reset_control_array_get_exclusive_released_named() >> >> that will request resets by given names and in a given order, similarly >> to devm_clk_bulk_get(). This will be very handy for both Tegra audio and >> GPU drivers. I'll prepare a v2 if there are no objections. > > I do have an untested reset control bulk API patch that I've just never > finished, because I had no user. I'll send you an RFC, let me know if > you can build on that. Hello, Philipp! Thank you very much for sharing the patch, it should be very useful!