From: <Claudiu.Beznea@microchip.com>
To: <maso.huang@mediatek.com>, <lgirdwood@gmail.com>,
<broonie@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<matthias.bgg@gmail.com>,
<angelogioacchino.delregno@collabora.com>, <perex@perex.cz>,
<tiwai@suse.com>, <trevor.wu@mediatek.com>,
<jiaxin.yu@mediatek.com>, <renzhijie2@huawei.com>,
<allen-kh.cheng@mediatek.com>, <alsa-devel@alsa-project.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v2 2/7] ASoC: mediatek: mt7986: support audio clock control
Date: Tue, 27 Jun 2023 04:37:13 +0000 [thread overview]
Message-ID: <455446f5-818b-8fd0-0308-3e3f9096bbd3@microchip.com> (raw)
In-Reply-To: <20230626023501.11120-3-maso.huang@mediatek.com>
On 26.06.2023 05:34, Maso Huang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add audio clock wrapper and audio tuner control.
>
> Signed-off-by: Maso Huang <maso.huang@mediatek.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> sound/soc/mediatek/mt7986/mt7986-afe-clk.c | 75 ++++++++++++++++++++++
> sound/soc/mediatek/mt7986/mt7986-afe-clk.h | 18 ++++++
> 2 files changed, 93 insertions(+)
> create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.h
>
> diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.c b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> new file mode 100644
> index 000000000000..a8b5fae05673
> --- /dev/null
> +++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * mt7986-afe-clk.c -- MediaTek 7986 afe clock ctrl
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Vic Wu <vic.wu@mediatek.com>
> + * Maso Huang <maso.huang@mediatek.com>
> + */
> +
> +#include <linux/clk.h>
> +
> +#include "mt7986-afe-common.h"
> +#include "mt7986-afe-clk.h"
> +#include "mt7986-reg.h"
> +
> +enum {
> + CK_INFRA_AUD_BUS_CK = 0,
> + CK_INFRA_AUD_26M_CK,
> + CK_INFRA_AUD_L_CK,
> + CK_INFRA_AUD_AUD_CK,
> + CK_INFRA_AUD_EG2_CK,
> + CLK_NUM
> +};
> +
> +static const char *aud_clks[CLK_NUM] = {
> + [CK_INFRA_AUD_BUS_CK] = "aud_bus_ck",
> + [CK_INFRA_AUD_26M_CK] = "aud_26m_ck",
> + [CK_INFRA_AUD_L_CK] = "aud_l_ck",
> + [CK_INFRA_AUD_AUD_CK] = "aud_aud_ck",
> + [CK_INFRA_AUD_EG2_CK] = "aud_eg2_ck",
> +};
> +
> +int mt7986_init_clock(struct mtk_base_afe *afe)
> +{
> + struct mt7986_afe_private *afe_priv = afe->platform_priv;
> + int ret, i;
> +
> + afe_priv->clks = devm_kcalloc(afe->dev, CLK_NUM,
> + sizeof(*afe_priv->clks), GFP_KERNEL);
> + if (!afe_priv->clks)
> + return -ENOMEM;
> + afe_priv->num_clks = CLK_NUM;
> +
> + for (i = 0; i < afe_priv->num_clks; i++)
> + afe_priv->clks[i].id = aud_clks[i];
> +
> + ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks);
> + if (ret)
> + return dev_err_probe(afe->dev, ret, "Failed to get clocks\n");
> +
> + return 0;
> +}
> +
> +int mt7986_afe_enable_clock(struct mtk_base_afe *afe)
> +{
> + struct mt7986_afe_private *afe_priv = afe->platform_priv;
> + int ret;
> +
> + ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks);
> + if (ret)
> + return dev_err_probe(afe->dev, ret, "Failed to enable clocks\n");
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(mt7986_afe_enable_clock);
> +
> +int mt7986_afe_disable_clock(struct mtk_base_afe *afe)
> +{
> + struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +
> + clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(mt7986_afe_disable_clock);
> diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.h b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> new file mode 100644
> index 000000000000..2f15b7a54bdc
> --- /dev/null
> +++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * mt7986-afe-clk.h -- MediaTek 7986 afe clock ctrl definition
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Vic Wu <vic.wu@mediatek.com>
> + * Maso Huang <maso.huang@mediatek.com>
> + */
> +
> +#ifndef _MT7986_AFE_CLK_H_
> +#define _MT7986_AFE_CLK_H_
> +
> +struct mtk_base_afe;
> +
> +int mt7986_init_clock(struct mtk_base_afe *afe);
> +int mt7986_afe_enable_clock(struct mtk_base_afe *afe);
> +int mt7986_afe_disable_clock(struct mtk_base_afe *afe);
> +#endif
> --
> 2.18.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-06-27 4:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-26 2:34 [PATCH v2 0/7] ASoC: mediatek: Add support for MT7986 SoC Maso Huang
2023-06-26 2:34 ` [PATCH v2 1/7] ASoC: mediatek: mt7986: add common header Maso Huang
2023-07-04 9:01 ` AngeloGioacchino Del Regno
2023-06-26 2:34 ` [PATCH v2 2/7] ASoC: mediatek: mt7986: support audio clock control Maso Huang
2023-06-27 4:37 ` Claudiu.Beznea [this message]
2023-07-04 8:53 ` AngeloGioacchino Del Regno
2023-06-26 2:34 ` [PATCH v2 3/7] ASoC: mediatek: mt7986: support etdm in platform driver Maso Huang
2023-07-04 8:58 ` AngeloGioacchino Del Regno
2023-06-26 2:34 ` [PATCH v2 4/7] ASoC: mediatek: mt7986: add " Maso Huang
2023-06-27 4:43 ` Claudiu.Beznea
2023-07-04 9:13 ` AngeloGioacchino Del Regno
2023-06-26 2:34 ` [PATCH v2 5/7] ASoC: mediatek: mt7986: add machine driver with wm8960 Maso Huang
2023-06-26 2:35 ` [PATCH v2 6/7] ASoC: dt-bindings: mediatek,mt7986-wm8960: add mt7986-wm8960 document Maso Huang
2023-06-29 14:58 ` Rob Herring
2023-06-26 2:35 ` [PATCH v2 7/7] ASoC: dt-bindings: mediatek,mt7986-afe: add audio afe document Maso Huang
2023-06-29 15:05 ` Rob Herring
[not found] ` <04a1a53ebd9df265da780c644a0db86952cde8db.camel@mediatek.com>
2023-07-24 7:25 ` [PATCH v2 0/7] ASoC: mediatek: Add support for MT7986 SoC Krzysztof Kozlowski
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