[PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache

[PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache

[Jarkko Nikula]

There is no need to sync first two registers from cache to hw after a reset.
First one is used to select page for register access and this driver is
normally accessing page 0 only. Second one does a software reset which is
obviously unneeded after hardware or previous software reset command.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
---
 sound/soc/codecs/tlv320aic3x.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index c3d96fc..9047bb1 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1114,7 +1114,7 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
 
 		/* Sync reg_cache with the hardware */
 		codec->cache_only = 0;
-		for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++)
+		for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++)
 			snd_soc_write(codec, i, cache[i]);
 		if (aic3x->model == AIC3X_MODEL_3007)
 			aic3x_init_3007(codec);
-- 
1.7.4.4

[PATCH 2/2] ASoC: tlv320aic3x: Do soft reset to codec when going to bias off state

[Jarkko Nikula]

TLV320AIC33, TLV320AIC34 and I believe others too in this family have some
hw bugs that cause that analogue and digital VDD supplies remain leaking
up to a few mA of current after certain use cases even the hw blocks inside
codec are driven to off.

Highest leakages occur after using the bypass paths inside codec but it
is possible to get smaller leakages just by toggling mute switches in
unused audio paths (i.e. no DAPM changes) while codec is on due another
active audio path.

While some cases are able to workaroud by making sure that e.g. output mixer
switches are muted before powering down the output stage this doesn't help
all the cases.

Therefore use the software reset command to clear possible leakage currents
since that works in every cases and affects only this codec instance. Only
drawback is that now cache sync is required everytime when codec bias comes
out from bias off state, not only when supply regulators were off.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
---
 sound/soc/codecs/tlv320aic3x.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 9047bb1..789453d 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1120,6 +1120,13 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
 			aic3x_init_3007(codec);
 		codec->cache_sync = 0;
 	} else {
+		/*
+		 * Do soft reset to this codec instance in order to clear
+		 * possible VDD leakage currents in case the supply regulators
+		 * remain on
+		 */
+		snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
+		codec->cache_sync = 1;
 		aic3x->power = 0;
 		/* HW writes are needless when bias is off */
 		codec->cache_only = 1;
-- 
1.7.4.4

Re: [PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache

[Liam Girdwood]

On 20/05/11 14:52, Jarkko Nikula wrote:
> There is no need to sync first two registers from cache to hw after a reset.
> First one is used to select page for register access and this driver is
> normally accessing page 0 only. Second one does a software reset which is
> obviously unneeded after hardware or previous software reset command.
> 
> Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
> ---
>  sound/soc/codecs/tlv320aic3x.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 

Both

Acked-by: Liam Girdwood <lrg@ti.com>

Re: [PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache

[Mark Brown]

On Sat, May 21, 2011 at 04:30:50PM +0100, Liam Girdwood wrote:

> Both

> Acked-by: Liam Girdwood <lrg@ti.com>

Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

As they're TI devices I guess you'd want to apply them?

Re: [PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache

[Liam Girdwood]

On 22/05/11 11:21, Mark Brown wrote:
> On Sat, May 21, 2011 at 04:30:50PM +0100, Liam Girdwood wrote:
> 
>> Both
> 
>> Acked-by: Liam Girdwood <lrg@ti.com>
> 
> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
> 
> As they're TI devices I guess you'd want to apply them?

Yep, both now applied.

Thanks

Liam