RE: [PATCH] ASoC: rt1320-sdw: Update the driver to support rt1321_va2

[Jack Yu <jack.yu@realtek.com>]

> -----Original Message-----
> From: Mark Brown <broonie@kernel.org>
> Sent: Wednesday, November 4, 2026 8:21 PM
> To: Jack Yu <jack.yu@realtek.com>
> Cc: broonie@kernel.org; lgirdwood@gmail.com; alsa-devel@alsa-project.org;
> lars@metafoo.de; Flove(HsinFu) <flove@realtek.com>; Oder Chiou
> <oder_chiou@realtek.com>; Shuming [范書銘] <shumingf@realtek.com>;
> Derek [方德義] <derek.fang@realtek.com>
> Subject: Re: [PATCH] ASoC: rt1320-sdw: Update the driver to support
> rt1321_va2
> 
> 
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> 
> 
> > RT1321 VA2 needs a different flow from VA0/VA1:
> >
> > - Load the VA2 MCU patch code.
> > - Update the VA2 init settings and add the companion mode settings.
> > - Before R0 calibration and R0 load, switch to TV mode and disable
> >   phase sync/silence detection so the DSP FW serves GET/SET_PARAM.
> > - Take the VA2 advance gain from the AFX1 header of the DSP FW.
> > - Extend the readable/volatile range of the DSP status registers.
> > - Increase the BRA sections to 16 for the 14-section DSP FW package.
> > - Hold a runtime PM reference in the kcontrol put handlers to avoid
> >   runtime suspend in the middle of a long DSP access.
> >
> > The VA2 MCU patch code is submitted to linux-firmware separately.
> 
> > @@ -1291,6 +1305,12 @@ static int rt1320_check_fw_ready(struct
> rt1320_sdw_priv *rt1320)
> >               regmap_read(rt1320->regmap, cmd_addr, &tmp);
> >               if (tmp == 0)
> >                       break;
> > +             else if (tmp != 0x1 && tmp != 0x2 && tmp != 0x3) {
> > +                     dev_warn(dev, "%s abnormal val, tmp:%x",
> __func__, tmp);
> > +                     for (i = 0; i < 8; i++)
> > +                             regmap_write(rt1320->regmap,
> RT1321_FW_PARAM_ADDR + i, 0x00);
> 
> This affects all the parts, are you sure it's right for RT1320?
I'll add a flag to differentiate it and make it va2 only.

> 
> > +     if (is_va2) {
> > +             regmap_read(rt1320->regmap, 0xc5fb, &reg_c5fb);
> > +             regmap_write(rt1320->regmap, 0xc5fb, 0x00);
> > +             regmap_update_bits(rt1320->regmap, 0xc047, 0x80, 0x00);
> > +             regmap_update_bits(rt1320->regmap, 0xc044, 0xe0, 0x00);
> > +             for (i = 0; i < 200; i++) {
> > +                     regmap_read(rt1320->regmap,
> RT1320_POWER_STATE, &reg_c560);
> > +                     if (reg_c560 == RT1320_K_R0_STATE)
> > +                             break;
> > +                     usleep_range(10000, 15000);
> > +             }
> > +             dev_dbg(dev, "%s, RT1320_POWER_STATE=0x%x, i=%d\n",
> __func__,
> 
> Perhaps rt1320_check_power_state_ready() could take some parameters?
I'll fix it in v2 patch.

> 
> > @@ -1660,6 +1709,30 @@ static void rt1320_calibrate(struct
> rt1320_sdw_priv *rt1320)
> >               goto _finish_;
> >       }
> >
> > +     if (is_va2) {
> > +             /* Switch to TV mode */
> > +             regmap_write(rt1320->regmap, 0xc5fb, 0x00);
> > +             regmap_write(rt1320->regmap, 0xcd00, 0xc5);
> > +             /* disable phase sync */
> > +             regmap_update_bits(rt1320->regmap, 0xc047, 0x80, 0x00);
> > +             /* through SRC */
> > +             regmap_write(rt1320->regmap, 0xc5c4, 0x12);
> > +             regmap_write(rt1320->regmap, 0xc570, 0x0b);
> 
> Do we need to clean up in the error handling path here?
I'll fix it in v2 patch.
> 
> --
> Mark Brown <broonie@kernel.org>