From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lars-Peter Clausen Subject: Re: [PATCH] ASoC: dapm: Add support for multi register mux Date: Fri, 04 Apr 2014 09:40:21 +0200 Message-ID: <533E61E5.2080907@metafoo.de> References: <1396494710-20944-1-git-send-email-aruns@nvidia.com> <533D1B65.3030405@metafoo.de> <781A12BB53C15A4BB37291FDE08C03F3A05CDCDF9F@HQMAIL02.nvidia.com> <533E5FD4.8040403@metafoo.de> <781A12BB53C15A4BB37291FDE08C03F3A05CDCE1AA@HQMAIL02.nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <781A12BB53C15A4BB37291FDE08C03F3A05CDCE1AA@HQMAIL02.nvidia.com> Sender: linux-kernel-owner@vger.kernel.org To: Arun Shamanna Lakshmi Cc: "lgirdwood@gmail.com" , "broonie@kernel.org" , "swarren@wwwdotorg.org" , "perex@perex.cz" , "tiwai@suse.de" , "alsa-devel@alsa-project.org" , "linux-kernel@vger.kernel.org" , Songhee Baek List-Id: alsa-devel@alsa-project.org On 04/04/2014 09:34 AM, Arun Shamanna Lakshmi wrote: > >> -----Original Message----- >> From: Lars-Peter Clausen [mailto:lars@metafoo.de] >> Sent: Friday, April 04, 2014 12:32 AM >> To: Arun Shamanna Lakshmi >> Cc: lgirdwood@gmail.com; broonie@kernel.org; >> swarren@wwwdotorg.org; perex@perex.cz; tiwai@suse.de; alsa- >> devel@alsa-project.org; linux-kernel@vger.kernel.org; Songhee Baek >> Subject: Re: [PATCH] ASoC: dapm: Add support for multi register mux >> >> On 04/03/2014 10:11 PM, Arun Shamanna Lakshmi wrote: >> [...] >>>> Here as well, default for bit_pos should be 0. >>> >>> This means when 'None' of the options are selected, by default, it >>> enumerates to 0. Since we are using __ffs, BIT(0) of Register-0 also >>> enumerates to 0. That's the reason why I used just ffs in the first place. >>> Let me know your opinion. My value table looks like below. >>> >>> #define MUX_VALUE(npart, nbit) (nbit + 32 * npart) >>> static const int mux_values[] = { >>> 0, >>> MUX_VALUE(0, 0), >>> . >>> . >>> . >>> MUX_VALUE(0, 31), >>> /* above inputs are for part0 mux */ >>> MUX_VALUE(1, 0), >>> . >>> . >>> . >>> MUX_VALUE(1, 31), >>> /* above inputs are for part1 mux */ >>> MUX_VALUE(2, 0), >>> . >>> . >>> . >>> MUX_VALUE(2, 31), >>> /* above inputs are for part2 mux */ >>> }; >> >> Ok, so having none of the input selected should be a valid user selectable >> option? > > Yes. If 'None' is selected, it goes and clears the register. So, can we have ffs( ) > instead of __ffs( ) ? It would fix this case. Yes, but you need to make sure to handle it also correctly in the put handler, since all of the registers need to be written to 0 in that case.