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Fri, 25 Oct 2019 07:48:17 +0000 Received: from [10.21.133.51] (172.20.13.39) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 25 Oct 2019 07:48:15 +0000 To: Mark Brown References: <20191018154833.7560-1-ben.dooks@codethink.co.uk> <20191018154833.7560-4-ben.dooks@codethink.co.uk> <2eef499e-d9d4-732a-ddd6-8d307d8cb08d@nvidia.com> <20191024191846.GJ46373@sirena.co.uk> From: Jon Hunter Message-ID: <549a97c6-ff73-abe0-7c2b-7f29f975e259@nvidia.com> Date: Fri, 25 Oct 2019 08:48:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20191024191846.GJ46373@sirena.co.uk> X-Originating-IP: [172.20.13.39] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1571989706; bh=woREg5ZGPYnyjcnXQe0LrTdl/bxEh/wloZDheV0D1f0=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=lAP1Sj08gBAXtiugJ6WTIE8CLP4n9lYXObLhwkh/u+CjgIrSBYhHBKRuNSNHk7I0d hyVYa8Vs26OvXdEpn9lVMA7ywtL0EFGnsn8K7LxrmUr50YpVfbhbzTZbg3VcS5Oj8z ubr/WnheSJ0i8UPEU75nrsnBdlVCXss827oaornGWrgwpdo/egbyv7aF2FNS8s6URF voGrdxAS1kRj1h+suyrRhlIDkOBz/YLSD4JfPdl28NpD9Rj/bE3PYJ3gt2CF77D8ZG 7FOkKalxBTqfKmV7OsyjoruqEckbo6/iPQApRQsOjd0/5FHGrBYxT1ptD2jufF99/h HtEF7LGoCxSEQ== Cc: linux-kernel@lists.codethink.co.uk, alsa-devel@alsa-project.org, Liam Girdwood , Takashi Iwai , Ben Dooks , Thierry Reding , Edward Cragg , linux-tegra@vger.kernel.org Subject: Re: [alsa-devel] [PATCH v5 3/7] ASoC: tegra: i2s: Add support for more than 2 channels X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 24/10/2019 20:18, Mark Brown wrote: > On Thu, Oct 24, 2019 at 05:12:21PM +0100, Jon Hunter wrote: >> On 18/10/2019 16:48, Ben Dooks wrote: > >>> @@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, >>> TEGRA30_I2S_CTRL_LRCK_MASK; >>> switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { >>> case SND_SOC_DAIFMT_DSP_A: >>> + ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE; > >> Sorry, I just saw the feedback on the previous iteration. I don't think >> we want to set the polarity but based upon the format that is passed ... > > The polarity should be set based on the the inversion flags in the > format, normally both DSP modes trigger on the rising edge of the LRCLK. > The difference is if there's a delay before the first data bit or not. Yes. Sorry I realise my email was not clear and when I meant format, I was referring to the bits in the format mask part of the format. In the example, I shared we use the inversion bits for the determining the polarity. There was an old version of one of our drivers where we had done this incorrectly. Cheers Jon -- nvpublic _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org https://mailman.alsa-project.org/mailman/listinfo/alsa-devel