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([75.28.21.198]) by smtp.gmail.com with ESMTPSA id u1-20020a05687036c100b0019ea8771fb0sm82550oak.13.2023.05.24.09.12.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 May 2023 09:12:52 -0700 (PDT) Message-ID: <646e3784.050a0220.71431.07f7@mx.google.com> X-Google-Original-Message-ID: Date: Wed, 24 May 2023 11:12:49 -0500 From: Chris Morgan To: Mark Brown Cc: linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, zyw@rock-chips.com, sebastian.reichel@collabora.com, andyshrk@163.com, jagan@amarulasolutions.com, perex@perex.cz, tiwai@suse.com, lgirdwood@gmail.com, heiko@sntech.de, conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, Chris Morgan Subject: Re: [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk References: <20230523213825.120077-1-macroalpha82@gmail.com> <20230523213825.120077-2-macroalpha82@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Message-ID-Hash: KT4LVBOFDOJYMT3CCSXW4JWJ74NQM5OC X-Message-ID-Hash: KT4LVBOFDOJYMT3CCSXW4JWJ74NQM5OC X-MailFrom: macroalpha82@gmail.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Wed, May 24, 2023 at 12:57:02PM +0100, Mark Brown wrote: > On Tue, May 23, 2023 at 04:38:20PM -0500, Chris Morgan wrote: > > > +static unsigned int ratios_12000[] = { > > + 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000, > > + 48000, 88235, 96000, > > +}; > > + > > +static struct snd_pcm_hw_constraint_list constraints_12000 = { > > + .count = ARRAY_SIZE(ratios_12000), > > + .list = ratios_12000, > > +}; > > ... > > > + case 12000000: > > + es8328->sysclk_constraints = &constraints_12000; > > + es8328->mclk_ratios = ratios_12000; > > The other constraints have separate rates and ratios, with wildly > different values between the two - the ratio (I'm guessing a clock > divider) being written to a 5 bit field which obviously can't contain > the actual sample rate. A bit over my head here, I saw this patch from the Rockchip BSP kernel branch and tested it on my mainline kernel. Long story short the clock for the mclk is 12000000. I see that there are similar issues for the ES8316 on the Rock 5B, so I will probably just wait for a proper fix there and then implement something similar here. Thank you.