From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29A5FC32792 for ; Mon, 30 Sep 2019 20:53:20 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A627D22516 for ; Mon, 30 Sep 2019 20:53:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="b3aGLyME"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="FsZqusXs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A627D22516 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 88FC11612; Mon, 30 Sep 2019 22:52:27 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 88FC11612 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1569876797; bh=VJgC4EV8D0wr0STCq6C3dON89RcsLQREQw+qa21DsxU=; h=To:References:From:Date:In-Reply-To:Cc:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=b3aGLyMEKbdngja9rFHXNAABNZipNZLxSgQyYF48KQiSXZcmV7qTFDm3DkXP41c9v +N9QkGQiWsO4ktmZF4x0v554nUyLGHjNCIyLuKIiFtYhE3TiIIcFDrLJUYiI2AqYxU T8p43OCFVABHXFS87jEBgvc+rWREupHpRJ5U/0+Y= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 17CCDF8036E; Mon, 30 Sep 2019 22:52:27 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 8A0ACF80391; Mon, 30 Sep 2019 22:52:25 +0200 (CEST) Received: from hqemgate15.nvidia.com (hqemgate15.nvidia.com [216.228.121.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 905E6F800D0 for ; Mon, 30 Sep 2019 22:52:21 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 905E6F800D0 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="FsZqusXs" Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 30 Sep 2019 13:52:28 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 30 Sep 2019 13:52:20 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 30 Sep 2019 13:52:20 -0700 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 30 Sep 2019 20:52:19 +0000 Received: from [10.26.11.193] (10.124.1.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 30 Sep 2019 20:52:17 +0000 To: Ben Dooks , , , Jaroslav Kysela , Takashi Iwai , Liam Girdwood , Mark Brown , Thierry Reding References: <20190930165130.10642-1-ben.dooks@codethink.co.uk> <20190930165130.10642-6-ben.dooks@codethink.co.uk> From: Jon Hunter Message-ID: <6d6ae684-dd5f-b180-9114-dafe12886d4f@nvidia.com> Date: Mon, 30 Sep 2019 21:52:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190930165130.10642-6-ben.dooks@codethink.co.uk> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1569876748; bh=B+bOA/1BEdGMiJVQNxtEh1S0E93VcCLi3h/Sq2DhnuM=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=FsZqusXsLoQaD1YLlaEduilpt2gDH4p4wYckHHXcAnS4i9zhQxl5smZoojlUG9jlU tg3iHOMhLxStwM/RtWE7dkJN0nsumgoByusz+YiLGBwl/nc8EA520pU+GGiK3IQoDb cKXeCpbZpWKkzRQ7+gBwS78k71KzHYnEhQlwA5ZGWLymn0tTVP4MlfJi3+M5sbgBEm 4HE5Yb+y7zPKyXh9gr5ZiyEzvstdDWQ3JxZHWVeUqKk2GgYjFdcr7Euc3+ZKORfYbM W0P/OLAxkVsIQZ05ltkTrWndQQ6Q8b7lRrJpz75R2HJHy+eYFJwVAyeKnpaMyhXwK8 v4Ok4iNnI4qHw== Cc: linux-kernel@lists.codethink.co.uk Subject: Re: [alsa-devel] [PATCH v3 5/7] ASoC: tegra: set i2s_offset to 0 for tdm X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 30/09/2019 17:51, Ben Dooks wrote: > Set the offset to 0 for TDM mode, as per the current setup. Note we also > move the data offset programming to the i2s hw_parameters call as per > the suggestion from Jon Hunter. > > Signed-off-by: Ben Dooks > --- > v2: > - fix the review comments and move the i2s offset setting > --- > sound/soc/tegra/tegra30_i2s.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c > index c573151da341..a03692b0afc3 100644 > --- a/sound/soc/tegra/tegra30_i2s.c > +++ b/sound/soc/tegra/tegra30_i2s.c > @@ -66,7 +66,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, > unsigned int fmt) > { > struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai); > - unsigned int mask = 0, val = 0; > + unsigned int mask = 0, val = 0, data_offset = 1; > unsigned int ch_mask, ch_val = 0; > > switch (fmt & SND_SOC_DAIFMT_INV_MASK) { > @@ -95,11 +95,13 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, > ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE; > val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC; > val |= TEGRA30_I2S_CTRL_LRCK_L_LOW; > + data_offset = 0; > break; > case SND_SOC_DAIFMT_DSP_B: > ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE; > val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC; > val |= TEGRA30_I2S_CTRL_LRCK_R_LOW; > + data_offset = 0; My understanding is that the difference between dsp-a and dsp-b is that dsp-a has an offset of 1 and dsp-b has an offset of 0. Cheers Jon -- nvpublic _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org https://mailman.alsa-project.org/mailman/listinfo/alsa-devel