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d=suse.de; s=susede2_ed25519; t=1682177773; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ce9hfdc8m+W2EzWPy7yHd0N6Fi03OIUINQggtsolc6g=; b=cV6RKTGwUvk7SqdbMSPxIENob5zsWXYu+XcbQWlzlxuAWOtHsEzb+752Yfx32WpBmHifZV Cf+0B1iPO7HODHCA== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 7859D13499; Sat, 22 Apr 2023 15:36:13 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id R/V6HO3+Q2RXUgAAMHmgww (envelope-from ); Sat, 22 Apr 2023 15:36:13 +0000 Date: Sat, 22 Apr 2023 17:36:12 +0200 Message-ID: <87edocoro3.wl-tiwai@suse.de> From: Takashi Iwai To: Oswald Buddenhagen Subject: Re: [PATCH v2] ALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards In-Reply-To: <20230422132430.1057490-1-oswald.buddenhagen@gmx.de> References: <20230422132430.1057490-1-oswald.buddenhagen@gmx.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/27.2 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Message-ID-Hash: U4AQWSR7CFZHDPEB2F3KWPSSFYXAN2A6 X-Message-ID-Hash: U4AQWSR7CFZHDPEB2F3KWPSSFYXAN2A6 X-MailFrom: tiwai@suse.de X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Sat, 22 Apr 2023 15:24:30 +0200, Oswald Buddenhagen wrote: > > Unlike the Alice2 chips used on 1st generation E-MU cards, the > Tina/Tina2 chips used on the 2nd gen cards have only six GPIN pins, > which means that we need to use a smaller mask. Failure to do so would > falsify the read data if the FPGA tried to raise an IRQ right at that > moment. This wasn't a problem so far, as we didn't actually enable FPGA > IRQs, but that's going to change soon. > > Signed-off-by: Oswald Buddenhagen > --- > v2: > - added description This is *MUCH* better and helpful to understand the changes. Applied now. Thanks! Takashi