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d="scan'208";a="891069714" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga005.jf.intel.com with ESMTP; 28 Jun 2023 07:42:55 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1qEWNi-000coK-0e; Wed, 28 Jun 2023 17:42:54 +0300 Date: Wed, 28 Jun 2023 17:42:53 +0300 From: Andy Shevchenko To: Amadeusz =?utf-8?B?U8WCYXdpxYRza2k=?= Cc: Bjorn Helgaas , Mark Brown , Takashi Iwai , alsa-devel@alsa-project.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Cezary Rojewski , Pierre-Louis Bossart , Kai Vehmanen Subject: Re: [RFC PATCH 4/8] ALSA: hda/i915: Update PCI IDs Message-ID: References: <20230628205135.517241-1-amadeuszx.slawinski@linux.intel.com> <20230628205135.517241-5-amadeuszx.slawinski@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230628205135.517241-5-amadeuszx.slawinski@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Message-ID-Hash: FSH7ADNPBZFO4GUJTIZRQC6GY4YHBX2G X-Message-ID-Hash: FSH7ADNPBZFO4GUJTIZRQC6GY4YHBX2G X-MailFrom: andriy.shevchenko@intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Wed, Jun 28, 2023 at 10:51:31PM +0200, Amadeusz Sławiński wrote: > Use PCI device IDs from pci_ids.h header Missing period at the end. ... > -#define IS_HSW_CONTROLLER(pci) (((pci)->device == 0x0a0c) || \ > - ((pci)->device == 0x0c0c) || \ > - ((pci)->device == 0x0d0c) || \ > - ((pci)->device == 0x160c)) > +#define IS_HSW_CONTROLLER(pci) (((pci)->device == PCI_DEVICE_ID_INTEL_HDA_HSW_0) || \ > + ((pci)->device == PCI_DEVICE_ID_INTEL_HDA_HSW_2) || \ > + ((pci)->device == PCI_DEVICE_ID_INTEL_HDA_HSW_3) || \ > + ((pci)->device == PCI_DEVICE_ID_INTEL_HDA_BDW)) The very same macro under different name appeared in the previous patch. Am I correct? Perhaps go further and first move it somewhere to be available for both? -- With Best Regards, Andy Shevchenko