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d="scan'208";a="22085694" Received: from sadhupha-mobl.amr.corp.intel.com (HELO [10.212.11.252]) ([10.212.11.252]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2024 13:37:47 -0700 Message-ID: Date: Mon, 15 Apr 2024 15:37:46 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] ASoC: rt715: add vendor clear control register To: Jack Yu , "broonie@kernel.org" , "lgirdwood@gmail.com" Cc: "alsa-devel@alsa-project.org" , "lars@metafoo.de" , "pierre-louis.bossart@intel.com" , "bard.liao@intel.com" , "Flove(HsinFu)" , Oder Chiou , =?UTF-8?B?U2h1bWluZyBb6IyD5pu46YqYXQ==?= , =?UTF-8?B?RGVyZWsgW+aWueW+t+e+qV0=?= References: <6a103ce9134d49d8b3941172c87a7bd4@realtek.com> Content-Language: en-US From: Pierre-Louis Bossart In-Reply-To: <6a103ce9134d49d8b3941172c87a7bd4@realtek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Message-ID-Hash: V4NEISGDTWAWYXQGWPJ2MILWF4P2APF7 X-Message-ID-Hash: V4NEISGDTWAWYXQGWPJ2MILWF4P2APF7 X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On 4/15/24 01:27, Jack Yu wrote: > Add vendor clear control register in readable register's > callback function. This prevents an access failure reported > in Intel CI tests. > > Signed-off-by: Jack Yu Closes: https://github.com/thesofproject/linux/issues/4860 Tested-by: Pierre-Louis Bossart