Re: [PATCH 1/2] ASoC: rt5682: fix the random recording noise of headset

[Keyon Jie <yang.jie@linux.intel.com>]

On 3/17/20 3:33 PM, shumingf@realtek.com wrote:
> From: Shuming Fan <shumingf@realtek.com>
> 
> The cycle time of FIFO clock should increase 2 times to avoid
> the random recording noise issue.
> This setting could apply to all known situations in i2s mode.

Thanks for fixing this Shuming.

Just try to understand what has happened.

Can you help share more details about it, e.g.
1. the recording noise happened on headset mic or dmic?
2. will this change impact the microphone sampling clock, or the BCLK 
that of the I2S bclk pin?
3. without this change, why the clk is wrong, some example?

Thanks,
~Keyon

> 
> Signed-off-by: Shuming Fan <shumingf@realtek.com>
> ---
>   sound/soc/codecs/rt5682.c | 2 ++
>   sound/soc/codecs/rt5682.h | 2 ++
>   2 files changed, 4 insertions(+)
> 
> diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
> index 7ca02a5e52e9..023bc672274b 100644
> --- a/sound/soc/codecs/rt5682.c
> +++ b/sound/soc/codecs/rt5682.c
> @@ -3643,6 +3643,8 @@ static int rt5682_i2c_probe(struct i2c_client *i2c,
>   			RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
>   	regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
>   			RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
> +	regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
> +			RT5682_FIFO_CLK_DIV_MASK, RT5682_FIFO_CLK_DIV_2);
>   
>   	INIT_DELAYED_WORK(&rt5682->jack_detect_work,
>   				rt5682_jack_detect_handler);
> diff --git a/sound/soc/codecs/rt5682.h b/sound/soc/codecs/rt5682.h
> index 43de6e802309..0baeece84ec4 100644
> --- a/sound/soc/codecs/rt5682.h
> +++ b/sound/soc/codecs/rt5682.h
> @@ -657,6 +657,8 @@
>   #define RT5682_DMIC_1_EN_SFT			15
>   #define RT5682_DMIC_1_DIS			(0x0 << 15)
>   #define RT5682_DMIC_1_EN			(0x1 << 15)
> +#define RT5682_FIFO_CLK_DIV_MASK		(0x7 << 12)
> +#define RT5682_FIFO_CLK_DIV_2			(0x1 << 12)
>   #define RT5682_DMIC_1_DP_MASK			(0x3 << 4)
>   #define RT5682_DMIC_1_DP_SFT			4
>   #define RT5682_DMIC_1_DP_GPIO2			(0x0 << 4)
>