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d="scan'208";a="1005225982" Received: from aslawinx-mobl.ger.corp.intel.com (HELO [10.94.0.91]) ([10.94.0.91]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2023 00:37:03 -0700 Message-ID: Date: Mon, 23 Oct 2023 09:37:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/13] ASoC: amd: acp: refactor acp i2s clock generation code Content-Language: en-US To: Syed Saba Kareem , broonie@kernel.org, alsa-devel@alsa-project.org Cc: Vijendar.Mukunda@amd.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, mario.limonciello@amd.com, venkataprasad.potturu@amd.com, arungopal.kondaveeti@amd.com, mastan.katragadda@amd.com, juan.martinez@amd.com, Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Kuninori Morimoto , V Sujith Kumar Reddy , open list References: <20231021145110.478744-1-Syed.SabaKareem@amd.com> <20231021145110.478744-2-Syed.SabaKareem@amd.com> From: =?UTF-8?Q?Amadeusz_S=C5=82awi=C5=84ski?= In-Reply-To: <20231021145110.478744-2-Syed.SabaKareem@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Message-ID-Hash: 2SDUN5EEFMWMA73HXTOFJBGIVY7HA46B X-Message-ID-Hash: 2SDUN5EEFMWMA73HXTOFJBGIVY7HA46B X-MailFrom: amadeuszx.slawinski@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On 10/21/2023 4:50 PM, Syed Saba Kareem wrote: > Refactor acp i2s LRCLK,BCLK generation code and move to commnon file. > > Signed-off-by: Syed Saba Kareem > --- > sound/soc/amd/acp/acp-i2s.c | 32 ++++++++++++++++++++++++++++++ > sound/soc/amd/acp/amd.h | 39 ------------------------------------- > 2 files changed, 32 insertions(+), 39 deletions(-) > > diff --git a/sound/soc/amd/acp/acp-i2s.c b/sound/soc/amd/acp/acp-i2s.c > index df350014966a..59d3a499771a 100644 > --- a/sound/soc/amd/acp/acp-i2s.c > +++ b/sound/soc/amd/acp/acp-i2s.c > @@ -20,10 +20,42 @@ > #include > #include > #include > +#include > > #include "amd.h" > > #define DRV_NAME "acp_i2s_playcap" > +#define I2S_MASTER_MODE_ENABLE 1 > +#define I2S_MODE_ENABLE 0 > +#define I2S_FORMAT_MODE GENMASK(1, 1) > +#define LRCLK_DIV_FIELD GENMASK(10, 2) > +#define BCLK_DIV_FIELD GENMASK(23, 11) > + > +static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id) > +{ > + u32 i2s_clk_reg, val; > + > + switch (dai_id) { > + case I2S_SP_INSTANCE: > + i2s_clk_reg = ACP_I2STDM0_MSTRCLKGEN; > + break; > + case I2S_BT_INSTANCE: > + i2s_clk_reg = ACP_I2STDM1_MSTRCLKGEN; > + break; > + case I2S_HS_INSTANCE: > + i2s_clk_reg = ACP_I2STDM2_MSTRCLKGEN; > + break; > + default: > + i2s_clk_reg = ACP_I2STDM0_MSTRCLKGEN; > + break; > + } > + > + val = I2S_MASTER_MODE_ENABLE; > + val |= I2S_MODE_ENABLE & BIT(1); There is I2S_FORMAT_MODE define, you probably want to use it instead of BIT(1), so there is no "magic number" mask? > + val |= FIELD_PREP(LRCLK_DIV_FIELD, adata->lrclk_div); > + val |= FIELD_PREP(BCLK_DIV_FIELD, adata->bclk_div); > + writel(val, adata->acp_base + i2s_clk_reg); > +} > > static int acp_i2s_set_fmt(struct snd_soc_dai *cpu_dai, > unsigned int fmt) > diff --git a/sound/soc/amd/acp/amd.h b/sound/soc/amd/acp/amd.h > index 487eefa5985f..87d1e1f7d6b6 100644 > --- a/sound/soc/amd/acp/amd.h > +++ b/sound/soc/amd/acp/amd.h > @@ -188,17 +188,6 @@ struct acp_dev_data { > u32 xfer_rx_resolution[3]; > }; > > -union acp_i2stdm_mstrclkgen { > - struct { > - u32 i2stdm_master_mode : 1; > - u32 i2stdm_format_mode : 1; > - u32 i2stdm_lrclk_div_val : 9; > - u32 i2stdm_bclk_div_val : 11; > - u32:10; > - } bitfields, bits; > - u32 u32_all; > -}; > - > extern const struct snd_soc_dai_ops asoc_acp_cpu_dai_ops; > extern const struct snd_soc_dai_ops acp_dmic_dai_ops; > > @@ -276,32 +265,4 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int > POINTER_RETURN_BYTES: > return byte_count; > } > - > -static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id) > -{ > - union acp_i2stdm_mstrclkgen mclkgen; > - u32 master_reg; > - > - switch (dai_id) { > - case I2S_SP_INSTANCE: > - master_reg = ACP_I2STDM0_MSTRCLKGEN; > - break; > - case I2S_BT_INSTANCE: > - master_reg = ACP_I2STDM1_MSTRCLKGEN; > - break; > - case I2S_HS_INSTANCE: > - master_reg = ACP_I2STDM2_MSTRCLKGEN; > - break; > - default: > - master_reg = ACP_I2STDM0_MSTRCLKGEN; > - break; > - } > - > - mclkgen.bits.i2stdm_master_mode = 0x1; > - mclkgen.bits.i2stdm_format_mode = 0x00; > - > - mclkgen.bits.i2stdm_bclk_div_val = adata->bclk_div; > - mclkgen.bits.i2stdm_lrclk_div_val = adata->lrclk_div; > - writel(mclkgen.u32_all, adata->acp_base + master_reg); > -} > #endif