Re: [PATCH v2 2/8] ASoC: cs42l42: Add SOFT_RESET_REBOOT register

[Richard Fitzgerald <rf@opensource.cirrus.com>]

On 18/1/23 16:41, Pierre-Louis Bossart wrote:
> 
> 
> On 1/18/23 10:04, Stefan Binding wrote:
>> From: Richard Fitzgerald <rf@opensource.cirrus.com>
>>
>> The SOFT_RESET_REBOOT register is needed to recover CS42L42 state after
>> a Soundwire bus reset.
> 
> Humm, you probably want to clarify the terminology, the 'soft reset' is

SOFT_RESET is what the register is called.

> defined in the SoundWire spec as the case where the peripheral device
> loses sync. Bus reset is a Severe Reset, but there's also a Hard Reset.
>
> does this 'SOFT_RESET_REBOOT' need to be accessed when there's a soft
> reset, or only after a Severe/Hard Reset?
> 

After a bus(severe)-reset or a forced(hard)-reset, but the code in
driver/soundwire doesn't issue FORCE_RESET so there's no need to handle
that. If there was some reason to have the core SoundWire code issue
FORCE_RESET it would also need to add a callback to all clients so they
can do any special handling.

 From the datasheet:

"After a FORCE_RESET, the master must issue a reboot command (set 
SFT_RST_REBOOT; see
p. 162) and wait for 2.5 ms.

After a bus reset, the master must issue a reboot command (set
SFT_RST_REBOOT; see p. 162) and wait for 2.5 ms."

SFT_RESET_REBOOT is in the SOFT_RESET_REBOOT register.

>>
>> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
>> Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
>> ---
>>   include/sound/cs42l42.h    | 5 +++++
>>   sound/soc/codecs/cs42l42.c | 2 ++
>>   2 files changed, 7 insertions(+)
>>
>> diff --git a/include/sound/cs42l42.h b/include/sound/cs42l42.h
>> index 1d1c24fdd0cae..3994e933db195 100644
>> --- a/include/sound/cs42l42.h
>> +++ b/include/sound/cs42l42.h
>> @@ -34,6 +34,7 @@
>>   #define CS42L42_PAGE_24		0x2400
>>   #define CS42L42_PAGE_25		0x2500
>>   #define CS42L42_PAGE_26		0x2600
>> +#define CS42L42_PAGE_27		0x2700
>>   #define CS42L42_PAGE_28		0x2800
>>   #define CS42L42_PAGE_29		0x2900
>>   #define CS42L42_PAGE_2A		0x2A00
>> @@ -720,6 +721,10 @@
>>   
>>   #define CS42L42_SRC_SDOUT_FS		(CS42L42_PAGE_26 + 0x09)
>>   
>> +/* Page 0x27 DMA */
>> +#define CS42L42_SOFT_RESET_REBOOT	(CS42L42_PAGE_27 + 0x01)
>> +#define CS42L42_SFT_RST_REBOOT_MASK	BIT(1)
>> +
>>   /* Page 0x28 S/PDIF Registers */
>>   #define CS42L42_SPDIF_CTL1		(CS42L42_PAGE_28 + 0x01)
>>   #define CS42L42_SPDIF_CTL2		(CS42L42_PAGE_28 + 0x02)
>> diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
>> index 2fefbcf7bd130..82aa11d6937be 100644
>> --- a/sound/soc/codecs/cs42l42.c
>> +++ b/sound/soc/codecs/cs42l42.c
>> @@ -293,6 +293,7 @@ bool cs42l42_readable_register(struct device *dev, unsigned int reg)
>>   	case CS42L42_SPDIF_SW_CTL1:
>>   	case CS42L42_SRC_SDIN_FS:
>>   	case CS42L42_SRC_SDOUT_FS:
>> +	case CS42L42_SOFT_RESET_REBOOT:
>>   	case CS42L42_SPDIF_CTL1:
>>   	case CS42L42_SPDIF_CTL2:
>>   	case CS42L42_SPDIF_CTL3:
>> @@ -358,6 +359,7 @@ bool cs42l42_volatile_register(struct device *dev, unsigned int reg)
>>   	case CS42L42_LOAD_DET_DONE:
>>   	case CS42L42_DET_STATUS1:
>>   	case CS42L42_DET_STATUS2:
>> +	case CS42L42_SOFT_RESET_REBOOT:
>>   		return true;
>>   	default:
>>   		return false;