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Mon, 30 Sep 2019 20:46:10 +0000 Received: from [10.26.11.193] (10.124.1.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 30 Sep 2019 20:46:07 +0000 To: Ben Dooks , , , Jaroslav Kysela , Takashi Iwai , Liam Girdwood , Mark Brown , Thierry Reding References: <20190930165130.10642-1-ben.dooks@codethink.co.uk> <20190930165130.10642-2-ben.dooks@codethink.co.uk> From: Jon Hunter Message-ID: Date: Mon, 30 Sep 2019 21:46:06 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190930165130.10642-2-ben.dooks@codethink.co.uk> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1569876377; bh=aP8Yb1kp1zTgUjI+b7/+x6S1ysAS9dX3mP+QllCMh/k=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=giUYZyE9pryo/M1wmjPiXNphCB/7B07UTCimNENCR5lcEk46kR0t7xi1jopaOL1EP 6qGMO5c92E04KiqYpRH7eBHMDADxiDgr9QemhyG6X6e8V3MWR0ENJGeYV35XzPssoW /ONkcn3bsZVgVPfJbDHyf60SAFFOBtfTEvAuzATArdY7laqvmR9dO1EqrMhIJK93pU HLUesjEWvH4emit9Rok7DS3ynX0B/U413X3+S5ODxjBMBmuTPvqhDu+d6pBcajeEqT LCXv3qLZC/pRq7XsqQLV8bqEPBvA85sHKLMitlp3JEct/ktmOZYgJuNS+0Ww1495sN Q+/ay7i0HCUKg== Cc: linux-kernel@lists.codethink.co.uk, Edward Cragg Subject: Re: [alsa-devel] [PATCH v3 1/7] ASoC: tegra: add a TDM configuration callback X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 30/09/2019 17:51, Ben Dooks wrote: > From: Edward Cragg > > Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform' > driver. > > Signed-off-by: Edward Cragg > [ben.dooks@codethink.co.uk: merge fix for power management] > [ben.dooks@codethink.co.uk: add review change for fsync of 1 clock] > Signed-off-by: Ben Dooks > --- > sound/soc/tegra/tegra30_i2s.c | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c > index ac6983c6bd72..7f9ef6abeae2 100644 > --- a/sound/soc/tegra/tegra30_i2s.c > +++ b/sound/soc/tegra/tegra30_i2s.c > @@ -254,6 +254,38 @@ static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd, > return 0; > } > > +/* > + * Set up TDM > + */ > +static int tegra30_i2s_set_tdm(struct snd_soc_dai *dai, > + unsigned int tx_mask, unsigned int rx_mask, > + int slots, int slot_width) > +{ > + struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai); > + unsigned int mask, val; > + > + dev_dbg(dai->dev, "%s: txmask=0x%08x rxmask=0x%08x slots=%d width=%d\n", > + __func__, tx_mask, rx_mask, slots, slot_width); > + > + /* Set up slots and tx/rx masks */ > + mask = TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK | > + TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_MASK | > + TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_MASK; > + > + val = (tx_mask << TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_SHIFT) | > + (rx_mask << TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_SHIFT) | > + ((slots - 1) << TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_SHIFT); I am not sure why this keeps changing. Why not set to 1 always? Jon -- nvpublic _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org https://mailman.alsa-project.org/mailman/listinfo/alsa-devel