Re: [REGRESSION 7.2-rc3] ASoC: cs35l56: component probe waits for an init_completion that cannot be signalled until the wait ends — whole sof_sdw card fails

["Salman S. Tahir" <salman.abusaad@gmail.com>]

Hi Richard,

Thanks for the diagnosis and the complete() -> complete_all() suggestion. I
tested it before replying, and I'm sorry to report it does not fix the 
failure
on this machine (Lenovo Yoga 9i 14ILL10, two SPI CS35L56 B0 amps, 7.2-rc3).

What I ran
----------
I rebuilt snd-soc-cs35l56 with exactly the one change you described:

sound/soc/codecs/cs35l56.c:2111, in cs35l56_init()
- complete(&cs35l56->init_completion);
+ complete_all(&cs35l56->init_completion);

(built module srcversion CEAF5F838FFE0750E41A81F, vermagic matching the 
running
kernel). I A/B'd it against the unmodified stock module, with my userspace
workaround removed so the card probes normally each boot. Warm reboots,
otherwise stock machine:

# | module | card | calL | calR | timeout | instFail | verdict
---+----------------------+------+------+------+---------+----------+--------
1 | STOCK | no | yes | no | yes | yes | FAIL
2 | FIX (complete_all) | no | yes | no | yes | yes | FAIL
3 | FIX (complete_all) | no | yes | no | yes | yes | FAIL

Both fix-arm boots fail identically to stock, and to the 11/11 stock 
failures
I reported originally: left amp calibrates, right amp never does, the 
component
probe times out, and the whole sof_sdw card is torn down.

Timeline (CLOCK_MONOTONIC), stock vs. complete_all
--------------------------------------------------
The two arms are timing-identical, which I think is the key point:

event STOCK(#1) FIX/complete_all(#3)
left amp identified (Rev B0) 5.369s 5.531s
right amp SPI probe binds regulators 5.663s 5.833s
left "Calibration applied" 9.526s 9.698s
right "_cs35l56_component_probe:
init_completion timed out" 10.813s 11.325s
right amp's own "Rev B0" id print 10.877s 11.404s

Log from the fix-arm boot (#3), complete_all() module loaded:

cs35l56 spi-cs35l56-left: Cirrus Logic CS35L56 Rev B0 OTP3 fw:3.4.4 
(patched=0) [5.531s]
cs35l56 spi-cs35l56-right: supply VDD_P not found, using dummy regulator 
[5.833s]
cs35l56 spi-cs35l56-left: DSP1: Firmware: 1a00d6 ... v3.11.26, 41 
algorithms [8.053s]
cs35l56 spi-cs35l56-left: Calibration applied [9.698s]
<-- right amp emits nothing at all through here -->
cs35l56 spi-cs35l56-right: _cs35l56_component_probe: init_completion 
timed out [11.325s]
cs35l56 spi-cs35l56-right: ASoC error (-19): at 
snd_soc_component_probe() on spi-cs35l56-right
sof_sdw sof_sdw: ASoC: failed to instantiate card -19 [11.325s]
cs35l56 spi-cs35l56-right: Cirrus Logic CS35L56 Rev B0 OTP3 fw:3.4.4 
(patched=0) [11.404s]

Observations, offered as data rather than theory
------------------------------------------------
The right amp's SPI probe binds its regulators at ~5.8s, but the amp then
produces no further log output for ~5.5s. Its own identification print 
(early
in cs35l56_init()/hw_init) does not appear until 11.404s -- 79 ms 
*after* the
component-probe wait has already timed out at 11.325s. The same holds in the
stock arm (id print 10.877s, 64 ms after the 10.813s timeout).

During that ~5.5s gap the left amp is doing its firmware download 
(finishing at
"Calibration applied" 9.698s). So on these boots the completion 
(complete() or
complete_all()) is being signalled too late to be waited on, rather than 
being
consumed by a second/earlier waiter -- the right amp's init simply hasn't
reached line 2111 by the time the waiter gives up. That's why complete_all()
changes nothing here. I'll leave the mechanism to you rather than speculate.

Caveat: N is small (3 boots) and all warm. But the signature is 100% 
consistent
and identical to the 11/11 stock failures, so I'm confident the change 
does not
address this failure.

One more data point in favour of the multiple-instantiation angle: my 
userspace
workaround is just to blacklist snd_soc_sof_sdw and modprobe it only 
after both
amps' SPI probes have returned, so the card is instantiated exactly 
once. With
that in place it comes up first time on every boot (including cold). 
Single vs.
repeated instantiation seems to be the whole difference here.

You mentioned recent changes to how ASoC probes and re-probes cards possibly
being why this surfaced now -- the "init runs after the wait ends" 
timing above
may be a data point for that. I have the hardware and can reproduce on 
demand,
so I'm happy to run an instrumented build (e.g. prints/timestamps around the
right amp's init and the component-probe wait), test another patch, or 
bisect
the ASoC probe/re-probe changes -- whatever is most useful to you. Just 
let me
know.

Thanks again for taking the time.

Salman

On Wed, Jul 15, 2026 07:10 PM, Richard Fitzgerald 
<rf@opensource.cirrus.com> wrote:

    On 15/07/2026 5:00 pm, Salman S. Tahir wrote:
     > Hi Richard and thanks for the prompt response and clarification.
     >
     > You are right. I am normally very weary of AI, but this one was a
    bit
     > beyond me!
     >
     > I will try your change and advise if anything goes wrong or it
    doesn't
     > work as expected.

    It's revealed a genuine bug in the driver. So we will need to get a fix
    out for that.

    It's likely the cause of your problem.

    There were some recent changes to the way ASoC probes and re-probes
    cards, which might be why this is only showing up now.