From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Subhransu S. Prusty" <subhransu.s.prusty@intel.com>,
alsa-devel@alsa-project.org
Cc: harshapriya.n@intel.com, tiwai@suse.de, mturquette@baylibre.com,
sboyd@codeaurora.org, lgirdwood@gmail.com,
Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com>,
patches.audio@intel.com, broonie@kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [alsa-devel] [PATCH 6/6] ASoC: Intel: kbl: Enable mclk and ssp sclk early
Date: Thu, 7 Sep 2017 17:19:25 -0500 [thread overview]
Message-ID: <f1f70b1f-7b83-876a-f0ce-0db6d3542f18@linux.intel.com> (raw)
In-Reply-To: <1504794565-19168-7-git-send-email-subhransu.s.prusty@intel.com>
> +static int platform_clock_control(struct snd_soc_dapm_widget *w,
> + struct snd_kcontrol *k, int event)
> +{
> + struct snd_soc_dapm_context *dapm = w->dapm;
> + struct snd_soc_card *card = dapm->card;
> + struct kbl_rt5663_private *priv = snd_soc_card_get_drvdata(card);
> +
> + clk_disable_unprepare(priv->mclk);
> + clk_disable_unprepare(priv->sclk);
> +
> + return 0;
> +}
> +
> static const struct snd_soc_dapm_widget kabylake_widgets[] = {
> SND_SOC_DAPM_HP("Headphone Jack", NULL),
> SND_SOC_DAPM_MIC("Headset Mic", NULL),
> @@ -77,7 +95,8 @@ enum {
> SND_SOC_DAPM_SPK("HDMI1", NULL),
> SND_SOC_DAPM_SPK("HDMI2", NULL),
> SND_SOC_DAPM_SPK("HDMI3", NULL),
> -
> + SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
> + platform_clock_control, SND_SOC_DAPM_POST_PMD),
[snip]
> +static int kabylake_enable_ssp_clks(struct snd_soc_card *card)
> +{
> +
> + struct kbl_rt5663_private *priv = snd_soc_card_get_drvdata(card);
> + int ret;
> +
> + /* Enable MCLK */
> + ret = clk_set_rate(priv->mclk, 24000000);
> + if (ret < 0) {
> + dev_err(card->dev, "Can't set rate for mclk, err: %d\n", ret);
> + return ret;
> + }
> +
> + ret = clk_prepare_enable(priv->mclk);
> + if (ret < 0) {
> + dev_err(card->dev, "Can't enable mclk, err: %d\n", ret);
> + return ret;
> + }
> +
> + /* Enable SCLK */
> + ret = clk_set_rate(priv->sclk, 3072000);
> + if (ret < 0) {
> + dev_err(card->dev, "Can't set rate for sclk, err: %d\n", ret);
> + clk_disable_unprepare(priv->mclk);
> + return ret;
> + }
> +
> + ret = clk_prepare_enable(priv->sclk);
> + if (ret < 0) {
> + dev_err(card->dev, "Can't enable sclk, err: %d\n", ret);
> + clk_disable_unprepare(priv->mclk);
> + }
> +
> + return ret;
> +}
> +
> static int kabylake_rt5663_hw_params(struct snd_pcm_substream *substream,
> struct snd_pcm_hw_params *params)
> {
> struct snd_soc_pcm_runtime *rtd = substream->private_data;
> struct snd_soc_dai *codec_dai = rtd->codec_dai;
> + struct snd_soc_card *card = rtd->card;
> int ret;
>
> + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
> + ret = kabylake_enable_ssp_clks(card);
Is there a reason why the clocks need to be enabled in the hw_params()
instead of platform_clock_control()?
The code is not symmetrical between enable/disable, is this intended? I
remember seeing this in a different context (dialog codec?).
next prev parent reply other threads:[~2017-09-07 22:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 14:29 [PATCH 0/6] ASoC: Intel: Skylake: Add a clk driver to enable ssp clks early Subhransu S. Prusty
2017-09-07 14:29 ` [PATCH 1/6] ASoC: Intel: Skylake: Modify skl_dsp_set_dma_control API arguments Subhransu S. Prusty
2017-10-09 10:44 ` Applied "ASoC: Intel: Skylake: Modify skl_dsp_set_dma_control API arguments" to the asoc tree Mark Brown
2017-09-07 14:29 ` [PATCH 2/6] ASoC: Intel: Skylake: Parse nhlt to populate clock information Subhransu S. Prusty
2017-09-07 14:29 ` [PATCH 3/6] ASoC: Intel: Skylake: Prepare DMA control IPC to enable/disable clock Subhransu S. Prusty
2017-09-07 14:29 ` [PATCH 4/6] ASoC: Intel: Skylake: Register clock device and ops Subhransu S. Prusty
2017-09-08 1:48 ` [alsa-devel] " Pierre-Louis Bossart
2017-09-08 3:31 ` Subhransu S. Prusty
2017-09-08 5:01 ` Subhransu S. Prusty
2017-09-08 13:41 ` Pierre-Louis Bossart
2017-09-15 12:40 ` Subhransu S. Prusty
2017-09-15 12:42 ` Subhransu S. Prusty
2017-09-07 14:29 ` [PATCH 5/6] ASoC: Intel: Skylake: Add ssp clock driver Subhransu S. Prusty
2017-09-07 16:46 ` Vinod Koul
2017-10-24 14:15 ` Stephen Boyd
2017-09-07 14:29 ` [PATCH 6/6] ASoC: Intel: kbl: Enable mclk and ssp sclk early Subhransu S. Prusty
2017-09-07 22:19 ` Pierre-Louis Bossart [this message]
2017-09-08 3:26 ` [alsa-devel] " Subhransu S. Prusty
[not found] ` <1505012579-19568-1-git-send-email-naveen.m@intel.com>
2017-09-18 3:42 ` [PATCH] ASoC: Intel: eve: " Vinod Koul
[not found] ` <1505021600-20416-1-git-send-email-naveen.m@intel.com>
2017-09-18 3:47 ` [PATCH v2] " Vinod Koul
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