From mboxrd@z Thu Jan 1 00:00:00 1970 From: Takashi Iwai Subject: Re: [PATCH 1/3] ALSA: hdspm - Add support for 128-192kHz WordClock input Date: Fri, 31 May 2013 15:09:25 +0200 Message-ID: References: <1369997831-7274-1-git-send-email-adi@drcomp.erfurt.thur.de> Mime-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mx2.suse.de (cantor2.suse.de [195.135.220.15]) by alsa0.perex.cz (Postfix) with ESMTP id C9CC92654BF for ; Fri, 31 May 2013 15:08:42 +0200 (CEST) In-Reply-To: <1369997831-7274-1-git-send-email-adi@drcomp.erfurt.thur.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org To: Adrian Knoth Cc: alsa-devel@alsa-project.org List-Id: alsa-devel@alsa-project.org At Fri, 31 May 2013 12:57:09 +0200, Adrian Knoth wrote: > > Allow WordClock input rates of 128, 176.4 and 192kHz. > > Signed-off-by: Adrian Knoth Thanks, applied all three patches. Takashi > > diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c > index ef3cbc0..e070ea8 100644 > --- a/sound/pci/rme9652/hdspm.c > +++ b/sound/pci/rme9652/hdspm.c > @@ -400,8 +400,8 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}"); > > #define HDSPM_wc_freq0 (1<<5) /* input freq detected via autosync */ > #define HDSPM_wc_freq1 (1<<6) /* 001=32, 010==44.1, 011=48, */ > -#define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */ > -/* missing Bit for 111=128, 1000=176.4, 1001=192 */ > +#define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, 111=128 */ > +#define HDSPM_wc_freq3 0x800 /* 1000=176.4, 1001=192 */ > > #define HDSPM_SyncRef0 0x10000 /* Sync Reference */ > #define HDSPM_SyncRef1 0x20000 > @@ -412,13 +412,17 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}"); > > #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync) > > -#define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2) > +#define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2|\ > + HDSPM_wc_freq3) > #define HDSPM_wcFreq32 (HDSPM_wc_freq0) > #define HDSPM_wcFreq44_1 (HDSPM_wc_freq1) > #define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1) > #define HDSPM_wcFreq64 (HDSPM_wc_freq2) > #define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2) > #define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2) > +#define HDSPM_wcFreq128 (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2) > +#define HDSPM_wcFreq176_4 (HDSPM_wc_freq3) > +#define HDSPM_wcFreq192 (HDSPM_wc_freq0|HDSPM_wc_freq3) > > #define HDSPM_status1_F_0 0x0400000 > #define HDSPM_status1_F_1 0x0800000 > @@ -1181,6 +1185,15 @@ static int hdspm_external_sample_rate(struct hdspm *hdspm) > case HDSPM_wcFreq96: > rate = 96000; > break; > + case HDSPM_wcFreq128: > + rate = 128000; > + break; > + case HDSPM_wcFreq176_4: > + rate = 176400; > + break; > + case HDSPM_wcFreq192: > + rate = 192000; > + break; > default: > rate = 0; > break; > -- > 1.7.10.4 >