From mboxrd@z Thu Jan 1 00:00:00 1970 From: Takashi Iwai Subject: Re: hdsp oss emulation and sync Date: Mon, 04 Jul 2005 18:16:03 +0200 Message-ID: References: <42C17BBC.1070402@mur.at> <42C2782A.7060308@mur.at> <42C45484.9010501@mur.at> Mime-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: multipart/mixed; boundary="Multipart_Mon_Jul__4_18:16:03_2005-1" Return-path: In-Reply-To: <42C45484.9010501@mur.at> Sender: alsa-devel-admin@lists.sourceforge.net Errors-To: alsa-devel-admin@lists.sourceforge.net List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , List-Archive: To: Peter Plessas Cc: alsa-devel@lists.sourceforge.net List-Id: alsa-devel@alsa-project.org --Multipart_Mon_Jul__4_18:16:03_2005-1 Content-Type: text/plain; charset=US-ASCII At Thu, 30 Jun 2005 22:22:28 +0200, Peter Plessas wrote: > > Hi Takashi&List, > > Yes, great! This works! What are the drawbacks of using the "Sample > Clock Source Locking"? If the locking is set, only the current sample rate is available for the PCMs opened later on. But this restriction doesn't matter since the oss-emulation does the sample rate conversion by itself. Also, setting this switch to off is exactly the same behavior as before. > I can see that i can't change the hdsp from > autosync to master after i enabled the locking. It's intentional in the last patch. I got rid of this behavior from the patch below, a newer version. I'll commit this to CVS. Takashi --Multipart_Mon_Jul__4_18:16:03_2005-1 Content-Type: text/plain; charset=US-ASCII Index: alsa-kernel/pci/rme9652/hdsp.c =================================================================== RCS file: /home/iwai/cvs/alsa/alsa-kernel/pci/rme9652/hdsp.c,v retrieving revision 1.90 diff -u -r1.90 hdsp.c --- alsa-kernel/pci/rme9652/hdsp.c 30 May 2005 17:19:18 -0000 1.90 +++ alsa-kernel/pci/rme9652/hdsp.c 4 Jul 2005 16:14:27 -0000 @@ -445,6 +445,7 @@ u32 control2_register; /* cached value */ u32 creg_spdif; u32 creg_spdif_stream; + int clock_source_locked; char *card_name; /* digiface/multiface */ HDSP_IO_Type io_type; /* ditto, but for code use */ unsigned short firmware_rev; @@ -2095,6 +2096,34 @@ return change; } +static int snd_hdsp_info_clock_source_lock(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + return 0; +} + +static int snd_hdsp_get_clock_source_lock(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + hdsp_t *hdsp = snd_kcontrol_chip(kcontrol); + + ucontrol->value.integer.value[0] = hdsp->clock_source_locked; + return 0; +} + +static int snd_hdsp_put_clock_source_lock(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + hdsp_t *hdsp = snd_kcontrol_chip(kcontrol); + int change; + + change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked; + if (change) + hdsp->clock_source_locked = ucontrol->value.integer.value[0]; + return change; +} + #define HDSP_DA_GAIN(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \ .name = xname, \ @@ -3117,6 +3146,15 @@ HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0), /* 'Sample Clock Source' complies with the alsa control naming scheme */ HDSP_CLOCK_SOURCE("Sample Clock Source", 0), +{ + /* FIXME: should be PCM or MIXER? */ + /* .iface = SNDRV_CTL_ELEM_IFACE_PCM, */ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Sample Clock Source Locking", + .info = snd_hdsp_info_clock_source_lock, + .get = snd_hdsp_get_clock_source_lock, + .put = snd_hdsp_put_clock_source_lock, +}, HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0), HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0), HDSP_AUTOSYNC_REF("AutoSync Reference", 0), @@ -3349,6 +3387,7 @@ snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode); snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate); + snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No"); snd_iprintf(buffer, "\n"); @@ -3853,13 +3892,14 @@ */ spin_lock_irq(&hdsp->lock); - if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) { - spin_unlock_irq(&hdsp->lock); - _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); - return err; - } else { - spin_unlock_irq(&hdsp->lock); + if (! hdsp->clock_source_locked) { + if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) { + spin_unlock_irq(&hdsp->lock); + _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); + return err; + } } + spin_unlock_irq(&hdsp->lock); if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) { _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); @@ -4284,13 +4324,17 @@ snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes); - if (hdsp->io_type == H9632) { - runtime->hw.channels_min = hdsp->qs_out_channels; - runtime->hw.channels_max = hdsp->ss_out_channels; + if (hdsp->clock_source_locked) { + runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate; + } else if (hdsp->io_type == H9632) { runtime->hw.rate_max = 192000; runtime->hw.rates = SNDRV_PCM_RATE_KNOT; snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates); } + if (hdsp->io_type == H9632) { + runtime->hw.channels_min = hdsp->qs_out_channels; + runtime->hw.channels_max = hdsp->ss_out_channels; + } snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, snd_hdsp_hw_rule_out_channels, hdsp, --Multipart_Mon_Jul__4_18:16:03_2005-1-- ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. 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