Re: [PATCH v2 1/4] drm/amdkfd: Bind gfx9 MQD in GART with mtype RW

["Kuehling, Felix" <felix.kuehling@amd.com>]

On 2025-12-01 09:28, Philip Yang wrote:
> For gfx9, bind MQD in GART with mtype RW to enable caching, to
> reduce queue switch latency.
>
> Signed-off-by: Philip Yang <Philip.Yang@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 ++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h  | 1 +
>   2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e553cf411191..5f58cff2c28b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -841,6 +841,8 @@ static void amdgpu_ttm_gart_bind_gfx9_mqd(struct amdgpu_device *adev,
>   	int i;
>   	uint64_t ctrl_flags = AMDGPU_PTE_MTYPE_VG10(flags, AMDGPU_MTYPE_NC);
>   
> +	flags = AMDGPU_PTE_MTYPE_VG10(flags, AMDGPU_MTYPE_RW);
> +
>   	pages_per_xcc = total_pages;
>   	do_div(pages_per_xcc, num_xcc);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 139642eacdd0..4dd15767a722 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -101,6 +101,7 @@ struct amdgpu_bo_vm;
>   	  AMDGPU_PTE_MTYPE_VG10_SHIFT(mtype))
>   
>   #define AMDGPU_MTYPE_NC 0
> +#define AMDGPU_MTYPE_RW 1

This is probably not the right place to define this. MTYPE_RW is not 
universally available on all our GPUs. Not even on all GFX9 GPUs. This 
MTYPE definition needs to be in an ASIC-specific header file, and 
probably already exists somewhere.

Also, we can't use MTYPE_RW on GPUs that don't support it. I believe it 
was added in MI300.

Regards,
   Felix


>   #define AMDGPU_MTYPE_CC 2
>   
>   #define AMDGPU_PTE_DEFAULT_ATC  (AMDGPU_PTE_SYSTEM      \