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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432dac216a4sm52353155e9.44.2024.11.15.04.27.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Nov 2024 04:27:11 -0800 (PST) Message-ID: <042c36ba-3a94-4d72-b2f1-5145d8fc623f@gmail.com> Date: Fri, 15 Nov 2024 13:27:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 15/15] drm/amdgpu/vcn: update work handler for per instance powergating To: Alex Deucher , amd-gfx@lists.freedesktop.org References: <20241113214453.17081-1-alexander.deucher@amd.com> <20241113214453.17081-16-alexander.deucher@amd.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20241113214453.17081-16-alexander.deucher@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 13.11.24 um 22:44 schrieb Alex Deucher: > Only gate/ungate the relevant instances. That won't work, that is the whole problem why we started this series in the first place. Regards, Christian. > > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > index 3383e4146c6a..24e9a3126763 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > @@ -418,8 +418,8 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work) > fences += fence[i]; > > if (!fences && !atomic_read(&vcn_inst->total_submission_cnt)) { > - amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, > - AMD_PG_STATE_GATE); > + amdgpu_device_ip_set_powergating_state_inst(adev, AMD_IP_BLOCK_TYPE_VCN, > + AMD_PG_STATE_GATE, i); > r = amdgpu_dpm_switch_power_profile(adev, PP_SMC_POWER_PROFILE_VIDEO, > false); > if (r) > @@ -444,8 +444,8 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) > } > > mutex_lock(&adev->vcn.inst[ring->me].vcn_pg_lock); > - amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, > - AMD_PG_STATE_UNGATE); > + amdgpu_device_ip_set_powergating_state_inst(adev, AMD_IP_BLOCK_TYPE_VCN, > + AMD_PG_STATE_UNGATE, ring->me); > > /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ > if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG &&