From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 1/2] drm/amdgpu: fix s3 resume back, uvd dpm randomly can't disable.
Date: Fri, 21 Oct 2016 18:13:55 +0800 [thread overview]
Message-ID: <1477044836-21474-1-git-send-email-Rex.Zhu@amd.com> (raw)
the value of last_mclk_dpm_enable_mask will be changed if
other clients(vce,dal) trigger set power state between enable
and disable uvd dpm.
Change-Id: I5bdca2ff7d401243780c71c8d73fdc1e8febaae1
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 6ecfc48..966e5bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -4081,7 +4081,7 @@ static int ci_enable_uvd_dpm(struct amdgpu_device *adev, bool enable)
pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
}
} else {
- if (pi->last_mclk_dpm_enable_mask & 0x1) {
+ if (pi->uvd_enabled == true) {
pi->uvd_enabled = false;
pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1;
amdgpu_ci_send_msg_to_smc_with_parameter(adev,
--
1.9.1
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next reply other threads:[~2016-10-21 10:13 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-21 10:13 Rex Zhu [this message]
[not found] ` <1477044836-21474-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2016-10-21 10:13 ` [PATCH 2/2] drm/amdgpu: when suspend, set boot state instand of disable dpm Rex Zhu
[not found] ` <1477044836-21474-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2016-10-21 15:05 ` Alex Deucher
2016-10-21 11:07 ` [PATCH 1/2] drm/amdgpu: fix s3 resume back, uvd dpm randomly can't disable Christian König
2016-10-21 14:56 ` Alex Deucher
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