From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rex Zhu Subject: [PATCH 2/2] drm/amdgpu: when suspend, set boot state instand of disable dpm. Date: Fri, 21 Oct 2016 18:13:56 +0800 Message-ID: <1477044836-21474-2-git-send-email-Rex.Zhu@amd.com> References: <1477044836-21474-1-git-send-email-Rex.Zhu@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1477044836-21474-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org> List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Rex Zhu Zml4IHBtLWhpYmVybmF0IGJ1Zywgd2hlbiBzdXNwZW5kL3Jlc3VtZSwgZHBtIHN0YXJ0IGZhaWxl ZC4KCkNoYW5nZS1JZDogSTAzNzg0ZjAwNDk1NjNiMTE3MjFlYmU5MDVkOWJlYTQwZWNjODIxNzAK U2lnbmVkLW9mZi1ieTogUmV4IFpodSA8UmV4LlpodUBhbWQuY29tPgotLS0KIGRyaXZlcnMvZ3B1 L2RybS9hbWQvYW1kZ3B1L2NpX2RwbS5jIHwgMTcgKysrKysrKysrKysrLS0tLS0KIDEgZmlsZSBj aGFuZ2VkLCAxMiBpbnNlcnRpb25zKCspLCA1IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvZ3B1L2RybS9hbWQvYW1kZ3B1L2NpX2RwbS5jIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9h bWRncHUvY2lfZHBtLmMKaW5kZXggOTY2ZTViZi4uMjdiMWZiNCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL2FtZC9hbWRncHUvY2lfZHBtLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9h bWRncHUvY2lfZHBtLmMKQEAgLTUyNzYsNyArNTI3Niw3IEBAIHN0YXRpYyBpbnQgY2lfZHBtX2Vu YWJsZShzdHJ1Y3QgYW1kZ3B1X2RldmljZSAqYWRldikKIAlpbnQgcmV0OwogCiAJaWYgKGFtZGdw dV9jaV9pc19zbWNfcnVubmluZyhhZGV2KSkKLQkJcmV0dXJuIC1FSU5WQUw7CisJCXJldHVybiAw OwogCWlmIChwaS0+dm9sdGFnZV9jb250cm9sICE9IENJU0xBTkRTX1ZPTFRBR0VfQ09OVFJPTF9O T05FKSB7CiAJCWNpX2VuYWJsZV92b2x0YWdlX2NvbnRyb2woYWRldik7CiAJCXJldCA9IGNpX2Nv bnN0cnVjdF92b2x0YWdlX3RhYmxlcyhhZGV2KTsKQEAgLTYzNDUsMTIgKzYzNDUsMTcgQEAgc3Rh dGljIGludCBjaV9kcG1fc3VzcGVuZCh2b2lkICpoYW5kbGUpCiAKIAlpZiAoYWRldi0+cG0uZHBt X2VuYWJsZWQpIHsKIAkJbXV0ZXhfbG9jaygmYWRldi0+cG0ubXV0ZXgpOwotCQkvKiBkaXNhYmxl IGRwbSAqLwotCQljaV9kcG1fZGlzYWJsZShhZGV2KTsKLQkJLyogcmVzZXQgdGhlIHBvd2VyIHN0 YXRlICovCi0JCWFkZXYtPnBtLmRwbS5jdXJyZW50X3BzID0gYWRldi0+cG0uZHBtLnJlcXVlc3Rl ZF9wcyA9IGFkZXYtPnBtLmRwbS5ib290X3BzOworCQlhbWRncHVfaXJxX3B1dChhZGV2LCAmYWRl di0+cG0uZHBtLnRoZXJtYWwuaXJxLAorCQkJICAgICAgIEFNREdQVV9USEVSTUFMX0lSUV9MT1df VE9fSElHSCk7CisJCWFtZGdwdV9pcnFfcHV0KGFkZXYsICZhZGV2LT5wbS5kcG0udGhlcm1hbC5p cnEsCisJCQkgICAgICAgQU1ER1BVX1RIRVJNQUxfSVJRX0hJR0hfVE9fTE9XKTsKKwkJYWRldi0+ cG0uZHBtLnVzZXJfc3RhdGUgPSBQT1dFUl9TVEFURV9UWVBFX0lOVEVSTkFMX0JPT1Q7CisJCWFk ZXYtPnBtLmRwbS5zdGF0ZSA9IFBPV0VSX1NUQVRFX1RZUEVfSU5URVJOQUxfQk9PVDsKIAkJbXV0 ZXhfdW5sb2NrKCZhZGV2LT5wbS5tdXRleCk7CisJCWFtZGdwdV9wbV9jb21wdXRlX2Nsb2Nrcyhh ZGV2KTsKKwogCX0KKwogCXJldHVybiAwOwogfQogCkBAIC02MzY4LDYgKzYzNzMsOCBAQCBzdGF0 aWMgaW50IGNpX2RwbV9yZXN1bWUodm9pZCAqaGFuZGxlKQogCQkJYWRldi0+cG0uZHBtX2VuYWJs ZWQgPSBmYWxzZTsKIAkJZWxzZQogCQkJYWRldi0+cG0uZHBtX2VuYWJsZWQgPSB0cnVlOworCQlh ZGV2LT5wbS5kcG0udXNlcl9zdGF0ZSA9IFBPV0VSX1NUQVRFX1RZUEVfQkFMQU5DRUQ7CisJCWFk ZXYtPnBtLmRwbS5zdGF0ZSA9IFBPV0VSX1NUQVRFX1RZUEVfQkFMQU5DRUQ7CiAJCW11dGV4X3Vu bG9jaygmYWRldi0+cG0ubXV0ZXgpOwogCQlpZiAoYWRldi0+cG0uZHBtX2VuYWJsZWQpCiAJCQlh bWRncHVfcG1fY29tcHV0ZV9jbG9ja3MoYWRldik7Ci0tIAoxLjkuMQoKX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KYW1kLWdmeCBtYWlsaW5nIGxpc3QKYW1k LWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcv bWFpbG1hbi9saXN0aW5mby9hbWQtZ2Z4Cg==