From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 1/2] drm/amdgpu: always un-gate UVD REGS path.
Date: Wed, 9 Nov 2016 18:08:54 +0800 [thread overview]
Message-ID: <1478686135-21055-1-git-send-email-Rex.Zhu@amd.com> (raw)
Change-Id: I910a79b551a9b79b635161bb42ac123a23783225
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index d2c96f1..d686946 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -596,7 +596,10 @@ static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
bool sw_mode)
{
u32 tmp, tmp2;
+ u32 data = RREG32(mmUVD_CGC_GATE);
+ data &= ~UVD_CGC_GATE__REGS_MASK;
+ WREG32(mmUVD_CGC_GATE, data);
tmp = RREG32(mmUVD_CGC_CTRL);
tmp &= ~(UVD_CGC_CTRL__CLK_OFF_DELAY_MASK | UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK);
tmp |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK |
--
1.9.1
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next reply other threads:[~2016-11-09 10:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-09 10:08 Rex Zhu [this message]
[not found] ` <1478686135-21055-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2016-11-09 10:08 ` [PATCH 2/2] drm/amdgpu: change log level to KERN_INFO in ci_dpm.c Rex Zhu
[not found] ` <1478686135-21055-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2016-11-09 17:34 ` Deucher, Alexander
2016-11-09 10:23 ` [PATCH 1/2] drm/amdgpu: always un-gate UVD REGS path StDenis, Tom
[not found] ` <CY4PR12MB17688DD4BBA4F17F489B4487F7B90-rpdhrqHFk06yjjPBNVDk/QdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-11-09 17:36 ` Deucher, Alexander
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