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From: Jim Qu <Jim.Qu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Jim Qu <Jim.Qu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/2] drm/amdgpu: restore uvd fence seq in uvd resume
Date: Fri, 15 Dec 2017 15:32:55 +0800	[thread overview]
Message-ID: <1513323175-9063-2-git-send-email-Jim.Qu@amd.com> (raw)
In-Reply-To: <1513323175-9063-1-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org>

otherwise, uvd block will be never powered up in ring begin_use()
callback. uvd ring test will be fail in resume in rumtime pm.

Change-Id: Ic623e789cc682ea07af228898f9aaf22511bbe20
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 89d59fd..e444847 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -346,6 +346,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev)
 			ptr += le32_to_cpu(hdr->ucode_size_bytes);
 		}
 		memset_io(ptr, 0, size);
+		/* to restore uvd fence seq */
+		amdgpu_fence_driver_force_completion(&adev->uvd.ring);
 	}
 
 	return 0;
-- 
1.9.1

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  parent reply	other threads:[~2017-12-15  7:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-15  7:32 [PATCH 1/2] drm/amdgpu: always cancel uvd idel handler in uvd suspend Jim Qu
     [not found] ` <1513323175-9063-1-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org>
2017-12-15  7:32   ` Jim Qu [this message]
     [not found]     ` <1513323175-9063-2-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org>
2017-12-15  7:37       ` 答复: [PATCH 2/2] drm/amdgpu: restore uvd fence seq in uvd resume Qu, Jim
2017-12-15  9:23   ` [PATCH 1/2] drm/amdgpu: always cancel uvd idel handler in uvd suspend Christian König

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