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From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 1/5] drm/amd/pp: Change activity_target for performance optimization on Polaris
Date: Tue, 23 Jan 2018 18:04:58 +0800	[thread overview]
Message-ID: <1516701902-14105-1-git-send-email-Rex.Zhu@amd.com> (raw)

And not support perDPM optimization on Polaris, so
delete sclk activity_target array.

Change-Id: I44ca01d5124bfbc7ce7802de7e037b8fa696c2ba
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h | 2 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c        | 1 +
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h        | 1 +
 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 6 +-----
 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h | 1 -
 5 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
index f967613..3477d4d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
@@ -50,6 +50,6 @@
 #define SMU7_CGULVCONTROL_DFLT                      0x00007450
 #define SMU7_TARGETACTIVITY_DFLT                     50
 #define SMU7_MCLK_TARGETACTIVITY_DFLT                10
-
+#define SMU7_SCLK_TARGETACTIVITY_DFLT                30
 #endif
 
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 54f569c..3ff9536 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -1485,6 +1485,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 	data->dll_default_on = false;
 	data->mclk_dpm0_activity_target = 0xa;
 	data->mclk_activity_target = SMU7_MCLK_TARGETACTIVITY_DFLT;
+	data->sclk_activity_target = SMU7_SCLK_TARGETACTIVITY_DFLT;
 	data->vddc_vddgfx_delta = 300;
 	data->static_screen_threshold = SMU7_STATICSCREENTHRESHOLD_DFLT;
 	data->static_screen_threshold_unit = SMU7_STATICSCREENTHRESHOLDUNIT_DFLT;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
index 1ce84cc..a626a3e 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
@@ -290,6 +290,7 @@ struct smu7_hwmgr {
 	bool                                      use_pcie_performance_levels;
 	bool                                      use_pcie_power_saving_levels;
 	uint32_t                                  mclk_activity_target;
+	uint16_t                                  sclk_activity_target;
 	uint32_t                                  mclk_dpm0_activity_target;
 	uint32_t                                  low_sclk_interrupt_threshold;
 	uint32_t                                  last_mclk_dpm_enable_mask;
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index a760a82..356f60e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -366,7 +366,6 @@ static bool polaris10_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 static int polaris10_smu_init(struct pp_hwmgr *hwmgr)
 {
 	struct polaris10_smumgr *smu_data;
-	int i;
 
 	smu_data = kzalloc(sizeof(struct polaris10_smumgr), GFP_KERNEL);
 	if (smu_data == NULL)
@@ -377,9 +376,6 @@ static int polaris10_smu_init(struct pp_hwmgr *hwmgr)
 	if (smu7_init(hwmgr))
 		return -EINVAL;
 
-	for (i = 0; i < SMU74_MAX_LEVELS_GRAPHICS; i++)
-		smu_data->activity_target[i] = PPPOLARIS10_TARGETACTIVITY_DFLT;
-
 	return 0;
 }
 
@@ -1037,7 +1033,7 @@ static int polaris10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 
 		result = polaris10_populate_single_graphic_level(hwmgr,
 				dpm_table->sclk_table.dpm_levels[i].value,
-				(uint16_t)smu_data->activity_target[i],
+				hw_data->sclk_activity_target,
 				&(smu_data->smc_state_table.GraphicsLevel[i]));
 		if (result)
 			return result;
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h
index 5e19c24..1ec425d 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h
@@ -59,7 +59,6 @@ struct polaris10_smumgr {
 	struct SMU74_Discrete_PmFuses  power_tune_table;
 	struct polaris10_range_table                range_table[NUM_SCLK_RANGE];
 	const struct polaris10_pt_defaults       *power_tune_defaults;
-	uint32_t               activity_target[SMU74_MAX_LEVELS_GRAPHICS];
 	uint32_t               bif_sclk_table[SMU74_MAX_LEVELS_LINK];
 };
 
-- 
1.9.1

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             reply	other threads:[~2018-01-23 10:04 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-23 10:04 Rex Zhu [this message]
     [not found] ` <1516701902-14105-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-01-23 10:04   ` [PATCH 2/5] drm/amd/pp: Delete dead code in powerplay Rex Zhu
2018-01-23 10:05   ` [PATCH 3/5] drm/amd/pp: Add struct profile_mode_setting for smu7 Rex Zhu
2018-01-23 10:05   ` [PATCH 4/5] drm/amd/pp: Delete unnecessary function argument in populate_single_graphic_level " Rex Zhu
2018-01-23 10:05   ` [PATCH 5/5] drm/amd/pp: Implement get_power_profile_mode on smu7 Rex Zhu
     [not found]     ` <1516701902-14105-5-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-01-23 15:15       ` Deucher, Alexander
     [not found]         ` <CY4PR12MB16533A747FDCDEBA8621F24FF7E30-rpdhrqHFk06apTa93KjAaQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-01-24  0:29           ` Zhu, Rex
     [not found]             ` <CY4PR12MB1687E1D608FA40C2E050B719FBE30-rpdhrqHFk06Y0SjTqZDccQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-01-24 15:05               ` Deucher, Alexander

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