From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCH 3/5] drm/amdgpu: enable system interrupt for jrbc Date: Wed, 18 Jul 2018 16:39:13 -0400 Message-ID: <1531946355-17488-3-git-send-email-boyuan.zhang@amd.com> References: <1531946355-17488-1-git-send-email-boyuan.zhang@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1531946355-17488-1-git-send-email-boyuan.zhang-5C7GfCeVMHo@public.gmane.org> List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Boyuan Zhang RnJvbTogQm95dWFuIFpoYW5nIDxib3l1YW4uemhhbmdAYW1kLmNvbT4KCkVuYWJsZSBzeXN0ZW0g aW50ZXJydXB0IGZvciBqcmJjIGR1cmluZyBlbmdpbmUgc3RhcnRpbmcgdGltZS4KClNpZ25lZC1v ZmYtYnk6IEJveXVhbiBaaGFuZyA8Ym95dWFuLnpoYW5nQGFtZC5jb20+Ci0tLQogZHJpdmVycy9n cHUvZHJtL2FtZC9hbWRncHUvdmNuX3YxXzAuYyB8IDggKysrKysrKy0KIDEgZmlsZSBjaGFuZ2Vk LCA3IGluc2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vYW1kL2FtZGdwdS92Y25fdjFfMC5jIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUv dmNuX3YxXzAuYwppbmRleCA0ZmNjYjIxLi4yMmMxNTg4IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dw dS9kcm0vYW1kL2FtZGdwdS92Y25fdjFfMC5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9hbWQvYW1k Z3B1L3Zjbl92MV8wLmMKQEAgLTU5NSw2ICs1OTUsNyBAQCBzdGF0aWMgaW50IHZjbl92MV8wX3N0 YXJ0KHN0cnVjdCBhbWRncHVfZGV2aWNlICphZGV2KQogCXN0cnVjdCBhbWRncHVfcmluZyAqcmlu ZyA9ICZhZGV2LT52Y24ucmluZ19kZWM7CiAJdWludDMyX3QgcmJfYnVmc3osIHRtcDsKIAl1aW50 MzJfdCBsbWlfc3dhcF9jbnRsOworCXVpbnQzMl90IHJlZ190ZW1wOwogCWludCBpLCBqLCByOwog CiAJLyogZGlzYWJsZSBieXRlIHN3YXBwaW5nICovCkBAIC03MDAsNiArNzAxLDExIEBAIHN0YXRp YyBpbnQgdmNuX3YxXzBfc3RhcnQoc3RydWN0IGFtZGdwdV9kZXZpY2UgKmFkZXYpCiAJCShVVkRf TUFTVElOVF9FTl9fVkNQVV9FTl9NQVNLfFVWRF9NQVNUSU5UX0VOX19TWVNfRU5fTUFTSyksCiAJ CX4oVVZEX01BU1RJTlRfRU5fX1ZDUFVfRU5fTUFTS3xVVkRfTUFTVElOVF9FTl9fU1lTX0VOX01B U0spKTsKIAorCS8qIGVuYWJsZSBzeXN0ZW0gaW50ZXJydXB0IGZvciBKUkJDKi8KKwlyZWdfdGVt cCA9IFJSRUczMihTT0MxNV9SRUdfT0ZGU0VUKFVWRCwgMCwgbW1VVkRfU1lTX0lOVF9FTikpOwor CXJlZ190ZW1wIHw9IFVWRF9TWVNfSU5UX0VOX19VVkRfSlJCQ19FTl9NQVNLOworCVdSRUczMihT T0MxNV9SRUdfT0ZGU0VUKFVWRCwgMCwgbW1VVkRfU1lTX0lOVF9FTiksIHJlZ190ZW1wKTsKKwog CS8qIGNsZWFyIHRoZSBiaXQgNCBvZiBWQ05fU1RBVFVTICovCiAJV1JFRzMyX1AoU09DMTVfUkVH X09GRlNFVChVVkQsIDAsIG1tVVZEX1NUQVRVUyksIDAsCiAJCQl+KDIgPDwgVVZEX1NUQVRVU19f VkNQVV9SRVBPUlRfX1NISUZUKSk7CkBAIC0xNzU0LDcgKzE3NjAsNyBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGFtZGdwdV9pcnFfc3JjX2Z1bmNzIHZjbl92MV8wX2lycV9mdW5jcyA9IHsKIAogc3Rh dGljIHZvaWQgdmNuX3YxXzBfc2V0X2lycV9mdW5jcyhzdHJ1Y3QgYW1kZ3B1X2RldmljZSAqYWRl dikKIHsKLQlhZGV2LT52Y24uaXJxLm51bV90eXBlcyA9IGFkZXYtPnZjbi5udW1fZW5jX3Jpbmdz ICsgMTsKKwlhZGV2LT52Y24uaXJxLm51bV90eXBlcyA9IGFkZXYtPnZjbi5udW1fZW5jX3Jpbmdz ICsgMjsKIAlhZGV2LT52Y24uaXJxLmZ1bmNzID0gJnZjbl92MV8wX2lycV9mdW5jczsKIH0KIAot LSAKMi43LjQKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CmFtZC1nZnggbWFpbGluZyBsaXN0CmFtZC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBz Oi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vYW1kLWdmeAo=