From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/2] drm/amd/pp: Return error immediately if load firmware failed
Date: Tue, 18 Sep 2018 21:11:14 +0800 [thread overview]
Message-ID: <1537276274-3331-2-git-send-email-Rex.Zhu@amd.com> (raw)
In-Reply-To: <1537276274-3331-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
this can avoid hard hang and be useful for debug.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
index f7e3bc2..a74c5be 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
@@ -724,11 +724,13 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)
if (hwmgr->chip_id == CHIP_STONEY)
fw_to_check &= ~(UCODE_ID_SDMA1_MASK | UCODE_ID_CP_MEC_JT2_MASK);
- ret = smu8_request_smu_load_fw(hwmgr);
- if (ret)
- pr_err("SMU firmware load failed\n");
+ smu8_request_smu_load_fw(hwmgr);
- smu8_check_fw_load_finish(hwmgr, fw_to_check);
+ ret = smu8_check_fw_load_finish(hwmgr, fw_to_check);
+ if (ret) {
+ pr_err("SMU firmware load failed\n");
+ return ret;
+ }
ret = smu8_load_mec_firmware(hwmgr);
if (ret)
--
1.9.1
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next prev parent reply other threads:[~2018-09-18 13:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-18 13:11 [PATCH 1/2] drm/amd/pp: Honour DC's clock limits on Rv Rex Zhu
[not found] ` <1537276274-3331-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-18 13:11 ` Rex Zhu [this message]
2018-09-18 14:29 ` Deucher, Alexander
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