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From: "Guttula, Suresh" <Suresh.Guttula-5C7GfCeVMHo@public.gmane.org>
To: "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Cc: "Sharma, Deepak" <Deepak.Sharma-5C7GfCeVMHo@public.gmane.org>,
	"Guttula, Suresh" <Suresh.Guttula-5C7GfCeVMHo@public.gmane.org>,
	"Agrawal, Akshu" <Akshu.Agrawal-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v2 2/3] drm/amd/powerplay:add hwmgr callback to update nbpstate on Carrizo
Date: Fri, 16 Nov 2018 06:50:32 +0000	[thread overview]
Message-ID: <1542351012-13110-2-git-send-email-suresh.guttula@amd.com> (raw)
In-Reply-To: <1542351012-13110-1-git-send-email-suresh.guttula-5C7GfCeVMHo@public.gmane.org>

Add hwmgr callback "update_nbdpm_pstate".This will use to access
"cz_nbdpm_pstate_enable_disable" function to enable/disable low
memory pstate.

Signed-off-by: suresh guttula <suresh.guttula@amd.com>
---

v2: commit message edited to explain more details
 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 1 +
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h        | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
index 53cf787..553a203 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
@@ -1992,6 +1992,7 @@ static const struct pp_hwmgr_func smu8_hwmgr_funcs = {
 	.power_state_set = smu8_set_power_state_tasks,
 	.dynamic_state_management_disable = smu8_disable_dpm_tasks,
 	.notify_cac_buffer_info = smu8_notify_cac_buffer_info,
+	.update_nbdpm_pstate = smu8_nbdpm_pstate_enable_disable,
 	.get_thermal_temperature_range = smu8_get_thermal_temperature_range,
 };
 
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 07d180ce..fb0f96f 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -317,6 +317,9 @@ struct pp_hwmgr_func {
 					uint32_t mc_addr_low,
 					uint32_t mc_addr_hi,
 					uint32_t size);
+	int (*update_nbdpm_pstate)(struct pp_hwmgr *hwmgr,
+					bool enable,
+					bool lock);
 	int (*get_thermal_temperature_range)(struct pp_hwmgr *hwmgr,
 					struct PP_TemperatureRange *range);
 	int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf);
-- 
2.7.4

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  parent reply	other threads:[~2018-11-16  6:50 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-16  6:50 [PATCH 1/3] Revert "drm/amd/powerplay: Enable/Disable NBPSTATE on On/OFF of UVD" Guttula, Suresh
     [not found] ` <1542351012-13110-1-git-send-email-suresh.guttula-5C7GfCeVMHo@public.gmane.org>
2018-11-16  6:50   ` Guttula, Suresh [this message]
2018-11-16  6:50   ` [PATCH v2 3/3] drm/amd:Enable/Disable NBPSTATE on On/OFF of UVD Guttula, Suresh
     [not found]     ` <1542351012-13110-3-git-send-email-suresh.guttula-5C7GfCeVMHo@public.gmane.org>
2018-11-16 14:53       ` Deucher, Alexander
  -- strict thread matches above, loose matches on Subject: below --
2018-11-27  7:18 [PATCH 1/3] Revert "drm/amd/powerplay: Enable/Disable NBPSTATE on On/OFF of UVD" Guttula, Suresh
     [not found] ` <1543303113-621-1-git-send-email-suresh.guttula-5C7GfCeVMHo@public.gmane.org>
2018-11-27  7:19   ` [PATCH v2 2/3] drm/amd/powerplay:add hwmgr callback to update nbpstate on Carrizo Guttula, Suresh

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