[PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic

[Oak Zeng <ozeng-5C7GfCeVMHo@public.gmane.org>]

Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358
Signed-off-by: Oak Zeng <ozeng@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/Makefile                |  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |  4 +-
 drivers/gpu/drm/amd/amdgpu/soc15.h                 |  1 +
 .../drm/amd/amdgpu/vega20_doorbell_index_init.c    | 64 ++++++++++++++++++++++
 4 files changed, 70 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 3ab8eba..b3b150b 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -63,8 +63,8 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce
 
 amdgpu-y += \
 	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \
-	vega20_reg_init.o nbio_v7_4.o vega10_doorbell_index_init.o vega12_doorbell_index_init.o \
-	vi_doorbell_index_init.o
+	vega20_reg_init.o nbio_v7_4.o vi_doorbell_index_init.o vega10_doorbell_index_init.o \
+	vega12_doorbell_index_init.o vega20_doorbell_index_init.o
 
 # add DF block
 amdgpu-y += \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3ffd8f5..19f2149 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
 		vi_doorbell_index_init(adev);
 	else if (adev->asic_type == CHIP_VEGA10)
 		vega10_doorbell_index_init(adev);
-	else
+	else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type == CHIP_RAVEN)
 		vega12_doorbell_index_init(adev);
+	else
+		vega20_doorbell_index_init(adev);
 
 	/* No doorbell on SI hardware generation */
 	if (adev->asic_type < CHIP_BONAIRE) {
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h
index 939c0e8..6ba0d26 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
@@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device *adev);
 
 void vega10_doorbell_index_init(struct amdgpu_device *adev);
 void vega12_doorbell_index_init(struct amdgpu_device *adev);
+void vega20_doorbell_index_init(struct amdgpu_device *adev);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
new file mode 100644
index 0000000..dcaef7f
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "amdgpu.h"
+
+void vega20_doorbell_index_init(struct amdgpu_device *adev)
+{
+	/* Compute + GFX: 0~255 */
+	adev->doorbell_index.kiq = 0x00;
+	adev->doorbell_index.mec_ring0 = 0x03;
+	adev->doorbell_index.mec_ring1 = 0x04;
+	adev->doorbell_index.mec_ring2 = 0x05;
+	adev->doorbell_index.mec_ring3 = 0x06;
+	adev->doorbell_index.mec_ring4 = 0x07;
+	adev->doorbell_index.mec_ring5 = 0x08;
+	adev->doorbell_index.mec_ring6 = 0x09;
+	adev->doorbell_index.mec_ring7 = 0x0a;
+	adev->doorbell_index.userqueue_start = 0x0b;
+	adev->doorbell_index.userqueue_end = 0x8a;
+	adev->doorbell_index.gfx_ring0 = 0x8b;
+	/* SDMA:256~335*/
+	adev->doorbell_index.sdma_engine0 = 0x100;
+	adev->doorbell_index.sdma_engine1 = 0x10a;
+	adev->doorbell_index.sdma_engine2 = 0x114;
+	adev->doorbell_index.sdma_engine3 = 0x11e;
+	adev->doorbell_index.sdma_engine4 = 0x128;
+	adev->doorbell_index.sdma_engine5 = 0x132;
+	adev->doorbell_index.sdma_engine6 = 0x13C;
+	adev->doorbell_index.sdma_engine7 = 0x146;
+	/* IH: 376~391 */
+	adev->doorbell_index.ih = 0x178;
+	/* MMSCH: 392~407 */
+	adev->doorbell_index.uvd_vce.uvd_ring0_1 = 0x188;
+	adev->doorbell_index.uvd_vce.uvd_ring2_3 = 0x189;
+	adev->doorbell_index.uvd_vce.uvd_ring4_5 = 0x18a;
+	adev->doorbell_index.uvd_vce.uvd_ring6_7 = 0x18b;
+	adev->doorbell_index.uvd_vce.vce_ring0_1 = 0x18c;
+	adev->doorbell_index.uvd_vce.vce_ring2_3 = 0x18d;
+	adev->doorbell_index.uvd_vce.vce_ring4_5 = 0x18e;
+	adev->doorbell_index.uvd_vce.vce_ring6_7 = 0x18f;
+	/* In unit of dword doorbell */
+	adev->doorbell_index.max_assignment = 0x18f << 1;
+}
+
-- 
2.7.4

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