From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 5/9] drm/amdgpu: Delay map sriov csa addr to ctx init
Date: Thu, 6 Dec 2018 19:32:33 +0800 [thread overview]
Message-ID: <1544095957-21101-5-git-send-email-Rex.Zhu@amd.com> (raw)
In-Reply-To: <1544095957-21101-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
1. meet kfd request
2. align with baremetal, in baremetal, driver map csa
per ctx.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 19 ++++++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 --------
2 files changed, 18 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 8802ff2..3ab7262 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -68,11 +68,13 @@ static int amdgpu_ctx_priority_permit(struct drm_file *filp,
}
static int amdgpu_ctx_init(struct amdgpu_device *adev,
+ struct amdgpu_fpriv *fpriv,
enum drm_sched_priority priority,
struct drm_file *filp,
struct amdgpu_ctx *ctx)
{
unsigned num_entities = amdgput_ctx_total_num_entities();
+ uint64_t csa_addr;
unsigned i, j;
int r;
@@ -86,6 +88,21 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
memset(ctx, 0, sizeof(*ctx));
ctx->adev = adev;
+ if (amdgpu_sriov_vf(adev)) {
+ if (!fpriv->csa_va) {
+ csa_addr = amdgpu_csa_vaddr(adev, 1) & AMDGPU_GMC_HOLE_MASK;
+ r = amdgpu_map_static_csa(adev, &fpriv->vm,
+ adev->virt.csa_obj,
+ &fpriv->csa_va,
+ csa_addr,
+ AMDGPU_CSA_SIZE);
+ if (r) {
+ amdgpu_free_static_csa(&adev->virt.csa_obj);
+ return -EINVAL;
+ }
+ }
+ }
+
ctx->fences = kcalloc(amdgpu_sched_jobs * num_entities,
sizeof(struct dma_fence*), GFP_KERNEL);
if (!ctx->fences)
@@ -255,7 +272,7 @@ static int amdgpu_ctx_alloc(struct amdgpu_device *adev,
}
*id = (uint32_t)r;
- r = amdgpu_ctx_init(adev, priority, filp, ctx);
+ r = amdgpu_ctx_init(adev, fpriv, priority, filp, ctx);
if (r) {
idr_remove(&mgr->ctx_handles, *id);
*id = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 338a091..34d000a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -977,14 +977,6 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
goto error_vm;
}
- if (amdgpu_sriov_vf(adev)) {
- uint64_t csa_addr = amdgpu_csa_vaddr(adev, 1) & AMDGPU_GMC_HOLE_MASK;
- r = amdgpu_map_static_csa(adev, &fpriv->vm, adev->virt.csa_obj,
- &fpriv->csa_va, csa_addr, AMDGPU_CSA_SIZE);
- if (r)
- goto error_vm;
- }
-
mutex_init(&fpriv->bo_list_lock);
idr_init(&fpriv->bo_list_handles);
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2018-12-06 11:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-06 11:32 [PATCH 1/9] drm/amdgpu: Limit vm max ctx number to 4096 Rex Zhu
[not found] ` <1544095957-21101-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-12-06 11:32 ` [PATCH 2/9] drm/amdgpu: Refine function amdgpu_csa_vaddr Rex Zhu
2018-12-06 11:32 ` [PATCH 3/9] drm/amdgpu: Use dynamical reserved vm size Rex Zhu
2018-12-06 11:32 ` [PATCH 4/9] drm/amdgpu: Add a bitmask in amdgpu_ctx_mgr Rex Zhu
[not found] ` <1544095957-21101-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-12-06 22:32 ` Kuehling, Felix
2018-12-06 11:32 ` Rex Zhu [this message]
2018-12-06 11:32 ` [PATCH 6/9] drm/amdgpu: Create csa per ctx Rex Zhu
2018-12-06 11:32 ` [PATCH 7/9] drm/amdgpu: Add csa mc address into job structure Rex Zhu
2018-12-06 11:32 ` [PATCH 8/9] drm/amdgpu: Add a argument in emit_cntxcntl interface Rex Zhu
2018-12-06 11:32 ` [PATCH 9/9] drm/amdgpu: Remove sriov check when insert ce/de meta_data Rex Zhu
-- strict thread matches above, loose matches on Subject: below --
2018-12-06 12:14 [PATCH 2/9] drm/amdgpu: Refine function amdgpu_csa_vaddr Rex Zhu
[not found] ` <1544098447-21648-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-12-06 12:14 ` [PATCH 5/9] drm/amdgpu: Delay map sriov csa addr to ctx init Rex Zhu
[not found] ` <1544098447-21648-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-12-06 12:38 ` Christian König
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1544095957-21101-5-git-send-email-Rex.Zhu@amd.com \
--to=rex.zhu-5c7gfcevmho@public.gmane.org \
--cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox