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From: "Christian König" <christian.koenig@amd.com>
To: Prike Liang <Prike.Liang@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Alexander.Deucher@amd.com
Subject: Re: [PATCH 2/3] drm/amdgpu: rework the userq tlb flush
Date: Wed, 5 Nov 2025 09:31:30 +0100	[thread overview]
Message-ID: <1d2bf595-d3be-4613-b515-8de3bde7a5bf@amd.com> (raw)
In-Reply-To: <20251105061630.4146604-2-Prike.Liang@amd.com>



On 11/5/25 07:16, Prike Liang wrote:
> The userq TLB flush should be performed after
> the vm update complete and input fence signal.
> 
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c    | 5 +++--
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> index a8bb3f1b8649..01707d72d982 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> @@ -384,6 +384,7 @@ amdgpu_userq_wait_for_last_fence(struct amdgpu_userq_mgr *uq_mgr,
>  			return -ETIME;
>  		}
>  	}
> +	amdgpu_gmc_flush_gpu_tlb_pasid(uq_mgr->adev, queue->vm->pasid, 2, true, 0);

Please drop that one, it doesn't seem to make any sense at all.

>  
>  	return ret;
>  }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 48a64d828eb8..1537f0b6b712 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1062,7 +1062,8 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
>  	}
>  
>  	/* Prepare a TLB flush fence to be attached to PTs */
> -	if (!params->unlocked && vm->is_compute_context) {
> +	if (!params->unlocked && (vm->is_compute_context ||
> +	     vm->is_userq_context)) {

Just drop the is_compute_context check here, don't add any new checks.

>  		amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
>  
>  		/* Makes sure no PD/PT is freed before the flush */
> @@ -2792,7 +2793,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
>  	amdgpu_bo_unreserve(root);
>  	amdgpu_bo_unref(&root);
>  	WARN_ON(vm->root.bo);
> -
> +	amdgpu_gmc_flush_gpu_tlb_pasid(adev, vm->pasid, 2, true, 0);

Please drop that one as well, it doesn't seem to make sense.

Regards,
Christian.

>  	amdgpu_vm_fini_entities(vm);
>  
>  	if (!RB_EMPTY_ROOT(&vm->va.rb_root)) {


  reply	other threads:[~2025-11-05  8:31 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05  6:16 [PATCH 1/3] drm/amdgpu: add user queue vm identifier Prike Liang
2025-11-05  6:16 ` [PATCH 2/3] drm/amdgpu: rework the userq tlb flush Prike Liang
2025-11-05  8:31   ` Christian König [this message]
2025-11-05  6:16 ` [PATCH 3/3] drm/amdgpu: fix the vm update tlb sequence Prike Liang
2025-11-05  8:32   ` Christian König
2025-11-05  8:28 ` [PATCH 1/3] drm/amdgpu: add user queue vm identifier Christian König

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