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From: Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
To: "Deucher, Alexander" <Alexander.Deucher-5C7GfCeVMHo@public.gmane.org>
Cc: "Huan, Alvin" <Alvin.Huan-5C7GfCeVMHo@public.gmane.org>,
	"Wang, Ken" <Ken.Wang-5C7GfCeVMHo@public.gmane.org>,
	"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	"Yu, Hui" <Hui.Yu-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH 10/14] drm/amdgpu: add rv770_get_memory_type to set the GDDR5 flag
Date: Wed, 31 Aug 2016 00:07:25 +0800	[thread overview]
Message-ID: <20160830160724.GC10345@hr-amur2> (raw)
In-Reply-To: <MWHPR12MB1694FA622ACA818EB655A084F7E00-Gy0DoCVfaSW4WA4dJ5YXGAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>

On Tue, Aug 30, 2016 at 10:21:21PM +0800, Deucher, Alexander wrote:
> > -----Original Message-----
> > From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> > Of Huang Rui
> > Sent: Tuesday, August 30, 2016 7:50 AM
> > To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> > Cc: Wang, Ken; Yu, Hui; Huang, Ray; Huan, Alvin
> > Subject: [PATCH 10/14] drm/amdgpu: add rv770_get_memory_type to set
> > the GDDR5 flag
> > 
> > Add rv770_get_memory_type to set mem_gddr5 flag, because it will be
> > used on the whole si dpm part.
> > 
> > Change-Id: I60f7ef38775c3b27e475f38f939905483fbb56f5
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/si_dpm.c | 16 ++++++++++++++++
> >  1 file changed, 16 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> > b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> > index 5f1e5fe..563aeea 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> > @@ -6433,8 +6433,24 @@ static void si_set_pcie_lane_width_in_smc(struct
> > amdgpu_device *adev,
> >  	}
> >  }
> > 
> > +void rv770_get_memory_type(struct amdgpu_device *adev)
> 
> adev->mc.vram_type should be set in the gmc module.  Use that instead of pi->mem_gddr5.  See ci_dpm.c for example.
> 

So should I use "adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5" check
instead? I will update it in V2.

Thanks,
Rui
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2016-08-30 16:07 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-30 11:49 [PATCH 00/14] drm/amdgpu/si: Make SI DPM workable Huang Rui
     [not found] ` <1472557811-8015-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2016-08-30 11:49   ` [PATCH 01/14] drm/amdgpu: add gfx v6 firmware versions for sysfs dump Huang Rui
2016-08-30 11:49   ` [PATCH 02/14] drm/amdgpu: add gmc " Huang Rui
2016-08-30 11:50   ` [PATCH 03/14] drm/amdgpu/si: add SI smc " Huang Rui
2016-08-30 11:50   ` [PATCH 04/14] drm/amdgpu: remove useless functions of si dpm Huang Rui
2016-08-30 11:50   ` [PATCH 05/14] drm/amdgpu: use DRM print instead of printk Huang Rui
2016-08-30 11:50   ` [PATCH 06/14] drm/amdgpu: fix oland and hainan asic specific handle at si_program_aspm Huang Rui
2016-08-30 11:50   ` [PATCH 07/14] drm/amdgpu/si: fix the dce6 for si macro Huang Rui
     [not found]     ` <1472557811-8015-8-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2016-08-30 14:17       ` Deucher, Alexander
     [not found]         ` <MWHPR12MB169435C80C235E574E2D61FBF7E00-Gy0DoCVfaSW4WA4dJ5YXGAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-08-30 16:04           ` Huang Rui
2016-08-30 11:50   ` [PATCH 08/14] drm/amdgpu: fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field Huang Rui
2016-08-30 11:50   ` [PATCH 09/14] drm/amdgpu: fix to miss adding thermal controller Huang Rui
2016-08-30 11:50   ` [PATCH 10/14] drm/amdgpu: add rv770_get_memory_type to set the GDDR5 flag Huang Rui
     [not found]     ` <1472557811-8015-11-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2016-08-30 14:21       ` Deucher, Alexander
     [not found]         ` <MWHPR12MB1694FA622ACA818EB655A084F7E00-Gy0DoCVfaSW4WA4dJ5YXGAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-08-30 16:07           ` Huang Rui [this message]
2016-08-30 16:17             ` Deucher, Alexander
     [not found]               ` <MWHPR12MB1694B6182E10BB1F6D03897FF7E00-Gy0DoCVfaSW4WA4dJ5YXGAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-08-30 16:28                 ` Huang Rui
2016-08-30 11:50   ` [PATCH 11/14] drm/amdgpu: fix incorrect index of CG_FFCT_0 register Huang Rui
2016-08-30 11:50   ` [PATCH 12/14] drm/amdgpu: introduce pcie port read/write entry Huang Rui
2016-08-30 11:50   ` [PATCH 13/14] drm/amdgpu: fix incorrect reading method at si_get_current_pcie_speed Huang Rui
2016-08-30 11:50   ` [PATCH 14/14] drm/amdgpu/si: enable SI DPM by default Huang Rui
2016-08-30 12:30   ` [PATCH 00/14] drm/amdgpu/si: Make SI DPM workable Christian König
     [not found]     ` <9298c36a-caef-3b43-285b-d118134a73e6-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-08-30 15:57       ` Huang Rui
2016-08-30 14:23   ` Deucher, Alexander

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