From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huang Rui Subject: Re: [PATCH v2 00/15] drm/amdgpu/si: Make SI DPM workable Date: Tue, 6 Sep 2016 10:35:54 +0800 Message-ID: <20160906023553.GA5814@hr-amur2> References: <1472621007-17578-1-git-send-email-ray.huang@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Marek =?utf-8?B?T2zFocOhaw==?= Cc: "Huan, Alvin" , amd-gfx mailing list , "Yu, Hui" , "Deucher, Alexander" , "Wang, Ken" , "Koenig, Christian" T24gVHVlLCBTZXAgMDYsIDIwMTYgYXQgMDM6MzE6NDZBTSArMDgwMCwgTWFyZWsgT2zFocOhayB3 cm90ZToKPiBIaSBSdWksCj4gCj4gRG8geW91IGhhdmUgVGFoaXRpIExFIGluIHRoZSBvZmZpY2U/ IEl0IG1pZ2h0IGJlIHdvcnRoIHRlc3RpbmcgaXQgdG8KPiBzZWUgaWYgaXQgd29ya3MuIFRoZXJl IHdlcmUgc29tZSBpc3N1ZXMgd2l0aCBpdCBpbiB0aGUgcGFzdC4KPiAKCkkgdXNlZCBUYWhpdGkg WFQgW0RldmljZSBJRCA2Nzk4XSwgZG8geW91IGtub3cgdGhlIGRldmljZSBpZCBvZiBUYWhpdGkg TEU/CgpUaGFua3MsClJ1aQpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fXwphbWQtZ2Z4IG1haWxpbmcgbGlzdAphbWQtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2FtZC1nZngK