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From: Tom St Denis <tstdenis82-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Tom St Denis <tom.stdenis-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 5/7] drm/amd/amdgpu: Tidy up SI IH code
Date: Tue,  6 Sep 2016 12:18:42 -0400	[thread overview]
Message-ID: <20160906161844.21370-6-tom.stdenis@amd.com> (raw)
In-Reply-To: <20160906161844.21370-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/si_ih.c | 30 ++++++++----------------------
 1 file changed, 8 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 994ff02db013..8fae3d4a2360 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_ih.c
@@ -57,7 +57,6 @@ static void si_ih_disable_interrupts(struct amdgpu_device *adev)
 
 static int si_ih_irq_init(struct amdgpu_device *adev)
 {
-	int ret = 0;
 	int rb_bufsz;
 	u32 interrupt_cntl, ih_cntl, ih_rb_cntl;
 	u64 wptr_off;
@@ -72,18 +71,15 @@ static int si_ih_irq_init(struct amdgpu_device *adev)
 	WREG32(IH_RB_BASE, adev->irq.ih.gpu_addr >> 8);
 	rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);
 
-	ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE |
-		      IH_WPTR_OVERFLOW_CLEAR |
-		      (rb_bufsz << 1));
-
-	ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE;
+	ih_rb_cntl = IH_WPTR_OVERFLOW_ENABLE |
+		     IH_WPTR_OVERFLOW_CLEAR |
+		     (rb_bufsz << 1) |
+		     IH_WPTR_WRITEBACK_ENABLE;
 
 	wptr_off = adev->wb.gpu_addr + (adev->irq.ih.wptr_offs * 4);
 	WREG32(IH_RB_WPTR_ADDR_LO, lower_32_bits(wptr_off));
 	WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(wptr_off) & 0xFF);
-
 	WREG32(IH_RB_CNTL, ih_rb_cntl);
-
 	WREG32(IH_RB_RPTR, 0);
 	WREG32(IH_RB_WPTR, 0);
 
@@ -93,10 +89,9 @@ static int si_ih_irq_init(struct amdgpu_device *adev)
 	WREG32(IH_CNTL, ih_cntl);
 
 	pci_set_master(adev->pdev);
-
 	si_ih_enable_interrupts(adev);
 
-	return ret;
+	return 0;
 }
 
 static void si_ih_irq_disable(struct amdgpu_device *adev)
@@ -165,9 +160,7 @@ static int si_ih_sw_init(void *handle)
 	if (r)
 		return r;
 
-	r = amdgpu_irq_init(adev);
-
-	return r;
+	return amdgpu_irq_init(adev);
 }
 
 static int si_ih_sw_fini(void *handle)
@@ -182,14 +175,9 @@ static int si_ih_sw_fini(void *handle)
 
 static int si_ih_hw_init(void *handle)
 {
-	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	r = si_ih_irq_init(adev);
-	if (r)
-		return r;
-
-	return 0;
+	return si_ih_irq_init(adev);
 }
 
 static int si_ih_hw_fini(void *handle)
@@ -229,12 +217,10 @@ static bool si_ih_is_idle(void *handle)
 static int si_ih_wait_for_idle(void *handle)
 {
 	unsigned i;
-	u32 tmp;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
 	for (i = 0; i < adev->usec_timeout; i++) {
-		tmp = RREG32(SRBM_STATUS) & SRBM_STATUS__IH_BUSY_MASK;
-		if (!tmp)
+		if (si_ih_is_idle(handle))
 			return 0;
 		udelay(1);
 	}
-- 
2.9.3

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  parent reply	other threads:[~2016-09-06 16:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-06 16:18 Various tidy'ups with SI DMA/DPM/SMC/IH code Tom St Denis
     [not found] ` <20160906161844.21370-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2016-09-06 16:18   ` [PATCH 1/7] drm/amd/amdgpu: Tidy up SI DMA code Tom St Denis
2016-09-06 16:18   ` [PATCH 2/7] drm/amd/amdgpu: Allow calling si_dpm_fini at any point Tom St Denis
2016-09-06 16:18   ` [PATCH 3/7] drm/amd/amdgpu: Clean up SI DPM table assignments Tom St Denis
2016-09-06 16:18   ` [PATCH 4/7] drm/amd/amdgpu: Correct whitespace in SI DPM code Tom St Denis
2016-09-06 16:18   ` Tom St Denis [this message]
2016-09-06 16:18   ` [PATCH 6/7] drm/amd/amdgpu: Tidy up SI SMC code Tom St Denis
2016-09-06 16:18   ` [PATCH 7/7] drm/amd/amdgpu: Comment out currently unused SI DPM struct Tom St Denis
     [not found]     ` <20160906161844.21370-8-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2016-09-07 14:45       ` Deucher, Alexander
     [not found]         ` <MWHPR12MB16946A5F5069CA4CAE4ABA7BF7F80-Gy0DoCVfaSW4WA4dJ5YXGAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-09-07 14:49           ` StDenis, Tom
     [not found]             ` <CY4PR12MB1768FBB1CC469E0C27182B9FF7F80-rpdhrqHFk06yjjPBNVDk/QdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-09-08  1:51               ` Michel Dänzer
2016-09-07  2:19   ` Various tidy'ups with SI DMA/DPM/SMC/IH code Edward O'Callaghan
2016-09-07 12:38   ` Huang Rui
2016-09-07 14:46   ` Deucher, Alexander

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