From: Nils Holland <nholland-iI9p2NPcQ/rYtjvyW6yDsg@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH] drm/amdgpu: Bring bo creation in line with radeon driver
Date: Sun, 22 Jan 2017 20:15:27 +0100 [thread overview]
Message-ID: <20170122191527.GA3125@tisys.org> (raw)
From d44ac1157fdb86e67822b6538ae6113c8d620412 Mon Sep 17 00:00:00 2001
From: Nils Holland <nholland@tisys.org>
Date: Sun, 22 Jan 2017 13:24:52 +0100
Subject: [PATCH] drm/amdgpu: Bring bo creation in line with radeon driver
Add the bo creation changes that have been done to the radeon driver in
recent times, e.g. disable GTT WC on 32 bit because it is broken there,
and also disable it generally (and print a warning message) when
CONFIG_X86_PAT is not set.
Signed-off-by: Nils Holland <nholland@tisys.org>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index bf79b73e1538..f71fe41c1c99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -363,11 +363,31 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
bo->flags = flags;
+#ifdef CONFIG_X86_32
+ /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
+ * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
+ */
+ bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
+ /* Don't try to enable write-combining when it can't work, or things
+ * may be slow
+ * See https://bugs.freedesktop.org/show_bug.cgi?id=88758
+ */
+
+#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
+ thanks to write-combining
+
+ if (bo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC;)
+ DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
+ "better performance thanks to write-combining\n");
+ bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#else
/* For architectures that don't support WC memory,
* mask out the WC flag from the BO
*/
if (!drm_arch_can_wc_memory())
bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#endif
amdgpu_fill_placement_to_bo(bo, placement);
/* Kernel allocation are uninterruptible */
--
2.11.0
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next reply other threads:[~2017-01-22 19:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-22 19:15 Nils Holland [this message]
[not found] ` <20170122191527.GA3125-iI9p2NPcQ/rYtjvyW6yDsg@public.gmane.org>
2017-01-23 2:46 ` [PATCH] drm/amdgpu: Bring bo creation in line with radeon driver Michel Dänzer
[not found] ` <854d801c-cf4d-9ea7-a23c-f2d3399dd270-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-01-23 10:29 ` Christian König
[not found] ` <3632c484-020b-d494-4373-04032d305385-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-01-23 21:38 ` Alex Deucher
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